PyNVMe3 Features

Last Modified: September 5, 2025

PyNVMe3 delivers a comprehensive set of features across PCIe, Controller, Namespace, Qpair, Buffer, and more.
These capabilities empower test developers to design validation scenarios for Client, Data Center, Enterprise, Industrial, and Automotive SSDs.

Platform

Native Python API for intuitive scripting
Compatible with multiple versions of Ubuntu LTS
Optimized for x86-64 hardware; optional ARM support
Seamless integration with VSCode, including extension for advanced debugging
CI/CD ready, streamlining test automation pipelines

Buffer

DMA memory buffer allocation
Host Memory Buffer (HMB) support
Controller Memory Buffer (CMB) allocation
Multiple data patterns for validation
Fast data compare utilities
Fine-grained byte-level access

PCIe

Direct access to PCIe configuration space and BAR memory space
MSIx interrupt configuration and verification
Advanced power management: L1.2, ASPM, D3hot
Power consumption monitoring for validation and efficiency studies

Qpair

Create and delete IO Submission Queues (SQ) and Completion Queues (CQ)
Queue placement in CMB
Queue priority management
Enable/disable interrupts and define custom interrupt vectors
Unlimited queue depth and number of queues

NVMe Commands

Submission and completion of any NVMe command
Support for AER, Vendor-Unique, and Security commands
Command-level callbacks for flexible handling
User-defined command timeouts
Detailed logging for Admin and IO queues
Compliance tests for NVMe 1.3 / 1.4 / 2.x
TCG/OPAL security protocol testing

NVMe Controller

Fully customizable NVMe initialization flow
Weighted Round Robin (WRR) command arbitration
Advanced Power State Transition (APST) support
HMB and Boot Partition support
Flexible arbitration scheme control: Round Robin and Weighted Round Robin

Data Flow

End-to-end data verification using CRC
High-performance IO generator (> 1M IOPS/core, ultra-low latency)
Detailed latency histogram collection
Parallel IO processing
Metamode: removes MDTS and MPS limits

Fault Injection

Direct manipulation of SQE, PRP, SGL, CID fields
Manual Doorbell control
HMB bit-flip fault simulation
Out-of-Band (OOB) fault scenarios

Event Injection

Power cycle control (off/on)
PCIe PERST# assertion support
Integration with external equipment for power event injections
Reset testing: PCIe FLR, PCIe hot reset, NVMe controller reset, NVMe subsystem reset

Enterprise

Multi-controller and multi-namespace support
Reservation and sharing features
Dual/Quad-port SSD support
Directive & Stream commands
Flexible Data Placement (FDP)
Zoned Namespace (ZNS)
Scatter Gather List (SGL)
Support for multiple LBA formats (e.g., 512B, 4KB)
Metadata and Protection Information (PI) support
SR-IOV virtualization

Management

I²C/SMBus support via TotalPhase Aardvark
MCTP transport layer support
Management Interface (MI) testing
SPDM 1.2 compliance tests
DOE (Data Object Exchange) support
VDM (Vendor Defined Messages) support