PyNVMe3 Features

PyNVMe3 Features

Last Modified: May 2, 2024

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All Rights Reserved.

PyNVMe3 offers a robust set of features on PCIe, Controller, Namespace, Qpair, Buffer, and more. Test developers can utilize these functionalities to craft test cases for various applications such as Client, Data Center, Enterprise, Industrial, and Automotive.


  • Native Python API
  • Compatible with multiple versions of Ubuntu LTS
  • Designed for x86-64 hardware
  • Support ARM platforms (optional)
  • Integration with VSCode
  • VSCode extension for enhanced script debugging
  • CI integration streamlining test automation


  • DMA memory buffer allocation
  • Host memory buffer (HMB) allocation
  • Buffer allocation within Controller Memory Buffer (CMB)
  • Diverse data pattern support
  • Rapid data comparison
  • Individual byte access


  • Access to PCIe configuration space
  • Access to PCIe memory space (BAR)
  • Interrupt configuration and verification (MSIx)
  • Advanced PCIe power management capabilities (L1.2, ASPM, D3hot)


  • Creation and deletion of IO CQ/SQ
  • CQ/SQ placement in CMB
  • Queue priority functionality
  • Interrupt enabling/disabling
  • Defining interrupt vectors for queues
  • No limit on Queue depth or number

NVMe Commands

  • Transmission and reaping of any NVMe commands
  • AER, Vendor Unique, and Security command support
  • Callback function availability for NVMe commands
  • User-defined timeout values for commands
  • Logging for admin and IO queues

NVMe Controller

  • Customizable NVMe initialization
  • Weighted Round Robin command arbitration
  • Power management via NVMe (APST)
  • HMB support
  • Boot Partition support

Data Flow

  • Transparent data verification via CRC
  • High-performance IO generator with ~1.5M IOPS/core and minimal latency
  • Comprehensive latency histogram statistics
  • Parallel processing capabilities
  • Metamode offers no MDTS or MPS limits

Fault Injection

  • Manipulation capabilities for SQE, PRP, SGL, CID
  • Manual Doorbell control
  • HMB bit-flipping

Event Injection

  • Power cycle capabilities (off/on)
  • PERST# support
  • Third-party equipment integration for power event injections
  • Resets: PCIe FLR, PCIe hot, NVMe controller, NVMe subsystem


  • Multiple controller support
  • Multiple namespace support
  • Reservation support
  • Dual/Quad-port SSD
  • Directive and Stream
  • Flexible Data Placement (FDP)
  • Zoned Namespace (ZNS)
  • Scatter Gather List (SGL)
  • Various LBA formats: 512, 4KB, etc
  • Metadata supported
  • End-to-end data protection and verification (PI)
  • Management Interface (MI)


  • SR-IOV support
  • Parallel test sessions for different DUTs/VFs
  • IO Deterministic
  • Endurance Group functionality
  • Weighted Round Robin Arbitration

Test Suites

  • NVMe conformance test
  • TCG tests: OPAL, Pyrite
  • Management Interface
  • HMB, Power State, Performance, and data reliability tests
  • QLC SSD Certification