PyNVMe3 Test Suites
Last Modified: August 18, 2024
Copyright © 2020-2024 GENG YUN Technology Pte. Ltd.
All Rights Reserved.
- Suite: scripts/conformance
- Suite: scripts/benchmark
- Suite: scripts/management
- Suite: scripts/production
Suite: scripts/conformance
folder: scripts/conformance/01_admin
file: scripts/conformance/01_admin/abort_test
function: scripts/conformance/01_admin/abort_test.py::test_dut_firmware_and_model_name
print firmware and model name to the log
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- Figure 249: Identify – Identify Controller Data Structure
Steps
- print Model Number
- print Firmware Revision
- format namespace
function: scripts/conformance/01_admin/abort_test.py::test_abort_specific_aer_command
send the abort command to abort a specific aer command
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- 5.1 Abort command
Steps
- send an aer command and get its cid
- send an abort command to abort the AER command by its cid
- check if the abort command aborts the AER command
function: scripts/conformance/01_admin/abort_test.py::test_abort_abort_command
send an abort command to abort another abort command
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- 5.1 Abort command
Steps
- check Abort Command Limit larger than 2
- send an abort command A to abort command with cid 0
- send another abort command to abort command A
- both above command shall complete successfully
- send an abort command B to abort command with cid 0xffff
- send another abort command to abort command B
- both above command shall complete successfully
- send an AER command
- send an abort command C to abort the above AER command
- send another abort command to abort command C
- the AER command shall be aborted if the first abort command is not aborted
function: scripts/conformance/01_admin/abort_test.py::test_abort_io_burst
abort IO command
Reference
- NVM Express Revision 1.4a, March 9, 2020.
Steps
- create sq/cq
- send 100 write and flush, trigger doorbell all in one time
- delay to abort
- abort the flush command
- reap all IO
- delete queue
file: scripts/conformance/01_admin/aer_test
function: scripts/conformance/01_admin/aer_test.py::test_aer_limit_exceeded
check the field Asynchronous Event Request Limit in identify data structure
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 96.
- The total number of simultaneously outstanding Asynchronous Event Request commands is limited by the Asynchronous Event Request Limit specified in the Identify Controller data structure in Figure 247.
Steps
- get Asynchronous Event Request Limit in identify data structure
- send all AER commands defined by the limit
- send one more AER command, and it shall be aborted
- abort all AER commands, and abort successfully
function: scripts/conformance/01_admin/aer_test.py::test_aer_no_timeout
send an AER command and check its completion
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 96.
Steps
- issue an AER command
- wait 15 seconds for the completion
- neither completion, nor host timeout happen on the AER command
- abort the AER command, and abort successfully
function: scripts/conformance/01_admin/aer_test.py::test_aer_sanitize
AER will be triggered when Sanitize Operation Completed event happens
Reference
- NVM Express Revision 1.4a, March 9, 2020. Figure 149:
- Asynchronous Event Information – NVM Command Set Specific Status 01h//Sanitize Operation Completed
Steps
- skip test if sanitize is not supported
- send one AER command
- start sanitize operation and check the AER event when the sanitize operation is completed
- start and wait sanitize operation complete again, and check the aer event
function: scripts/conformance/01_admin/aer_test.py::test_aer_mask_event
mask an AER event and the AER notification shall not be triggered
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 214.
- 5.21.1.11 Asynchronous Event Configuration (Feature Identifier 0Bh)
Steps
- issue an AER command
- mask the SMART/health Asynchronous event
- get current temperature
- set the composite temperature threshold lower than current temperature
- AER notification shall not be triggered
- check SMART/health log Critical Warning bit 1 was set
- revert to default setting
function: scripts/conformance/01_admin/aer_test.py::test_aer_fw_activation_starting
AER is triggered by Firmware Activation Starting
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 100.
- 5.2 Asynchronous Event Request command
- Figure 148: Asynchronous Event Information – Notice
Steps
- skip if the firmware commands are not supported
- skip if the firwmare slot 1 is read only
- skip if OAES is not supported
- enable Firmware Activation Starting event
- skip if Firmware Activation Starting event is not supported
- issue an AER command to check if it is triggered by Firmware Activation Starting later
- activate an existed firmware slot and AER notification is triggered
- get the logpage to clear the AER event
- recover AER configuration setting
function: scripts/conformance/01_admin/aer_test.py::test_aer_event_no_aer
no outstanding AER command, AER should not be triggerred
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 96.
- 5.2 Asynchronous Event Request command
Steps
- initialize controller without sending any AER command
- enable all kinds of Asynchronous event
- get current temperature
- set temperature threshold below to current temperature
- check no AER notification is triggered
- check SMART/health log Critical Warning bit 1 was set
- recover temperature threshold
function: scripts/conformance/01_admin/aer_test.py::test_aer_abort_all_aer_commands
send all aer commands supported by the controller and abort them
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 96:
- 5.1 Abort command: The Abort command is used to abort a specific command previously submitted to the Admin Submission
- Queue or an I/O Submission Queue.
Steps
- disable all aer events
- get the maximum number of AER commands supported by the controller
- send all AER commands supported by the controller
- send one more AER command and should get AER event
- send abort command
- Write to Invalid Doorbell Register and confirm no AER notification is triggered
function: scripts/conformance/01_admin/aer_test.py::test_aer_temperature
AER will be triggered when Temperature exceed limit happen.
Reference
- NVM Express Revision 1.4a March 9, 2020. Figure 147:
- Asynchronous Event Information – SMART / Health Status: 01h//Temperature Threshold: A temperature is greater than or equal to an over temperature thresholdor less than or equal to an under temperature threshold (refer to section 5.21.1.4).
Steps
- issue an AER command
- set feature to enable all asynchronous events
- get current temperature
- set Over Temperature Threshold to trigger AER
- read log page to clear the event
- getlogpage to clear events
- set Under Temperature Threshold to trigger AER
- read log page to clear the event
- check smart data for critical warning of the temperature event
- recover to original setting
function: scripts/conformance/01_admin/aer_test.py::test_aer_doorbell_invalid_register
AER will be triggered when writing invalid doorbell register.
Reference
- NVM Express Revision 1.4a March 9, 2020.Figure 146:
- Asynchronous Event Information – Error Status 00h: Write to Invalid Doorbell Register: Host software wrote the doorbell of a queue that was not created.
Steps
- issue an AER command
- create CQ and SQ
- delete SQ first
- write doorbell of the deleted SQ to cause the event Invalid Doorbell Register
- read log page to clear the event
- delete cq
function: scripts/conformance/01_admin/aer_test.py::test_aer_doorbell_out_of_range
AER will be triggered when write an invalid doorbell value
Reference
- NVM Express Revision 1.4a March 9, 2020. Figure 146:
- Asynchronous Event Information – Error Status 01h: Invalid Doorbell Write Value: Host software attempted to write an invalid doorbell value.
- the value written was out of range of the corresponding queue’s base address and size;
Steps
- issue an AER command
- create CQ and SQ
- sq tail register value written was out of range of queue size
- read log page to clear the event
file: scripts/conformance/01_admin/dst_test
function: scripts/conformance/01_admin/dst_test.py::test_dst_short_valid_namespace
short DST command for valid namespace
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 108.
Steps
- start a short DST
- check Log Page if dst operation is in-progress
function: scripts/conformance/01_admin/dst_test.py::test_dst_extended_processing
extended DST command for valid namespace
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 108.
Steps
- issue a extended DST
- check log page if extended DST operation is in-progress
function: scripts/conformance/01_admin/dst_test.py::test_dst_short_time
a short DST command should complete in two minutes or less
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 348.
- A short device self-test operation should complete in two minutes or less.
Steps
- start a short DST, and record start time
- wait DST operation complete
- check if the completion time is less than 2 minutes
function: scripts/conformance/01_admin/dst_test.py::test_dst_invalid_namespace
DST command with invalid namespace ID will be aborted with Invalid Namespace or Format
Reference
- NVM Express Revision 1.4a, March 9, 2020.
Steps
- issue a DST with invalid namespace ID, it will be aborted
function: scripts/conformance/01_admin/dst_test.py::test_dst_invalid_stc
DST command with invalid stc value will be aborted with Invalid Field in Command
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- issue a DST command with invalid stc value, it will be aborted.
function: scripts/conformance/01_admin/dst_test.py::test_dst_in_progress
new DST command shall fail with Device Self-test in Progress during device self-test in progress
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- Figure 168:When Self-test in Progress, abort the new Device Self-test command with status Device Self-test in Progress.
Steps
- issue the first DST
- issue the second DST, the second DST will be aborted because of the first DST in progress.
function: scripts/conformance/01_admin/dst_test.py::test_dst_in_progress_abort_dst
abort DST command will abort device self-test operation in progress
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- Figure 168
Steps
- issue the first DST command
- issue abort DST command to abort the first DST in the background
- check log page has been updated, because the first DST was aborted by an abort DST command
function: scripts/conformance/01_admin/dst_test.py::test_dst_short_abort_by_controller_reset
short DST shall be aborted by any Controller Level Reset
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 348.
- A short device self-test operation shall be aborted by any Controller Level Reset that affects the controller on which the device self-test is being performed.
Steps
- start a short DST
- Controller Reset abort short DST operation in the background
- check there is no DST in progress
- check if the result is Operation was aborted by a Controller Level Reset
- start another short DST, and abort
function: scripts/conformance/01_admin/dst_test.py::test_dst_abort_by_format
DST Operation will be aborted because of the processing of a Format NVM command
Reference
- NVM Express Revision 1.4a March 9, 2020.
- Figure 202:Operation was aborted due to the processing of a Format NVM command
Steps
- issue a DST command
- check DST log page: No device self-test operation in progress
- check DST log page: Operation was aborted due to the processing of a Format NVM command
function: scripts/conformance/01_admin/dst_test.py::test_dst_abort_by_format_fna_0
DST Operation will be aborted because of the processing of a Format NVM command
Reference
- NVM Express Revision 1.4a March 9, 2020, Page 349.
- Figure 477: Format NVM command Aborting a Device Self-Test Operation
Steps
- skip if NVMe spec version is below 1.4
- get current LBA format id
- skip if FNA bit is not 0 in the Identify Controller data structure
- issue a short DST, nsid = 1
- issue a format when FNA is 0, nsid = 1
- check if DST is aborted by format command
- issue a DST, nsid=1
- issue a format when FNA is 0, nsid = 0xffffffff
- check if DST is aborted by format command
- issue a DST, nsid=0xffffffff
- issue a format when FNA is 0, nsid=0xffffffff
- check if DST is aborted by format command
- issue a DST, nsid=0xffffffff
- issue a format when FNA is 0, nsid=1
- check if DST is aborted by format command
function: scripts/conformance/01_admin/dst_test.py::test_dst_abort_by_format_fna_1
DST for all namespace will be aborted because of the processing of a Format NVM command when FNA is 1
Reference
- NVM Express Revision 1.4a March 9, 2020, Page 349.
- Figure 477: Format NVM command Aborting a Device Self-Test Operation
Steps
- skip if NVMe spec version is below 1.4
- skip if FNA bit is not 1 in the Identify Controller data structure
- get current LBA format id
- issue DST with a nsid
- issue format command with a different namespace id
- check if DST is aborted by format command
function: scripts/conformance/01_admin/dst_test.py::test_dst_abort_by_sanitize
DST Operation will be aborted when a sanitize operation starts
Reference
- NVM Express Revision 1.4a March 9, 2020, Page 234.
- When a sanitize operation starts on any controller, all controllers in the NVM subsystem:Shall abort device self-test operations in progress;
Steps
- only test in 1.4
- skip if sanitize is not supported
- issue a DST command
- check if the DST is started
- issue sanitize command to abort the DST operation
- wait till the sanitize completes
- clear the event by read log page
- check if DST is aborted by sanitize command
function: scripts/conformance/01_admin/dst_test.py::test_dst_after_sanitize
sanitize in progress will abort a DST command
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.24 Sanitize command – NVM Command Set Specific
Steps
- skip if sanitize is not supported
- start a sanitize operation
- if sanitize operation is finished, skip test
- issue a DST command, it will be aborted by in-progress sanitize
- check if sanitize status is in progress, and AER is triggered
- clear the event by read log page
function: scripts/conformance/01_admin/dst_test.py::test_dst_abort_by_command
Verify abort dst command processing.
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 108.
- Fh – Abort device self-test. Completes command successfully. The Device Self-test Log is not modified.
Steps
- issue short dst
- issue Abort dst
- check if short dst aborted
- check Device Self-test Status in the Newest Self-test Result Data Structure
- check the Current Device Self-test Status field
function: scripts/conformance/01_admin/dst_test.py::test_dst_extended_time_limit
Verify extended dst command should complete in specify time
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 349:
- An extended device self-test operation should complete in the time indicated in the Extended Device Selftest Time field in the Identify Controller data structure or less.
Steps
- check Extended Device Self-test Time in identify
- fix on PS0, and disable apst
- check get log page before issue dst
- issue dst
- check dst log page till complete
- check the Current Device Self-test Status field in the Device Self-test Log
- check the Current Device Self-Test Completion in the Device Self-test Log
- check complete time
- check Device Self-test Status in the Newest Self-test Result Data Structure
function: scripts/conformance/01_admin/dst_test.py::test_dst_with_ioworker
execute dst operations along with different stress ioworker
Reference
- A short device self-test operation should complete in two minutes or less.
Steps
- start streee IO
- issue dst command during ioworker work
- check dst log page till no dst in progress
- check the Current Device Self-test Status field in the Device Self-test Log
- check the Current Device Self-Test Completion in the Device Self-test Log
- reset controller after DST is completed
- check if the completion time is less than 2 minutes
function: scripts/conformance/01_admin/dst_test.py::test_dst_extended_not_abort_by_flr_reset
extended DST should not be aborted by flr.
Reference
- NVM Express Revision 1.4a. Page350.
Steps
- check if FLR is supported
- start an extended DST operation
- check DST status
- FLR the controller
- check if DST is still running or finished normally
function: scripts/conformance/01_admin/dst_test.py::test_dst_extended_not_abort_by_controller_level_reset
Verify extended DST operation will be not aborted by Subsystem Reset.
Reference
- NVM Express Revision 1.4a. Page349.
- An extended device self-test operation shall persist across any Controller Level Reset, and shall resume after completion of the reset or any restoration of power, if any.
Steps
- start an extended DST operation
- check DST status
- cc.en reset
- check DST status again
function: scripts/conformance/01_admin/dst_test.py::test_dst_short_abort_by_flr_reset
short DST should be aborted by FLR
Reference
- NVM Express Revision 1.4a. Page349.
Steps
- check if FLR is supported
- start a short DST operation
- check DST status
- FLR the controller
- check DST status again
file: scripts/conformance/01_admin/features_test
function: scripts/conformance/01_admin/features_test.py::test_features_fid_0
setfeature with feature ID 0
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 206.
Steps
- setfeature with feature ID 0, the command shall complete with error
function: scripts/conformance/01_admin/features_test.py::test_features_sel_00
use Select 0 to get the current operating attribute value
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 116.
- A Select field cleared to 000b (i.e., current) returns the current operating attribute value for the Feature Identifier specified.
Steps
- setfeature and getfeature with Select 0
- check the data set and get in above commands
function: scripts/conformance/01_admin/features_test.py::test_features_sel_01
use Select 01 to get the default operating attribute value
Reference
- NVM Express Revision 1.4c, Page 301.
Steps
- feature Temperature Threshold Current Setting is not Persists Across Power Cycle and reset
- check if the feature is saveable
- check the current operating attribute shall be the same as the default
- a Get Features command to read the saved value returns the default value.
- setfeature to change the current operating attribute
- verify if the current operating attribute is set correctly
- verify the default attribute value is not changed
- the default value is used after a Controller Level Reset
- restore the current operating attribute to original value
function: scripts/conformance/01_admin/features_test.py::test_features_sel_01_reserved_bit
set feature with an invalid data using reserved bit in cdw11
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 184.
Steps
- check the current operating attribute shall be the same as the default
- setfeature to change the current operating attribute to an invalid data using the reserved bit
- verify if the reserved bit is not set to the current operating attribute
- restore the current operating attribute to original value
function: scripts/conformance/01_admin/features_test.py::test_features_sel_11
use Select 011b to get the capabilities supported for a feature
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 116.
Steps
- skip if feature Save is not supported
- send getfeatures commands with Select 011b
- the commands shall complete successfully
function: scripts/conformance/01_admin/features_test.py::test_features_invalid_sel
use an invalid Select
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 116.
Steps
- send getfeatures command with invalid Select
- the commands complete with error Invalid Fields
function: scripts/conformance/01_admin/features_test.py::test_features_set_volatile_write_cache
set/get feature Volatile Write Cache
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- 5.21.1.6 Volatile Write Cache
Steps
- skip if volatile cache is not present
- get the original write cache setting
- enable the write cache and verify the feature is set correctly
- skip the several writes to get the real write latency
- get the write latency with write cache enabled
- disable the cache and verify the feature
- get the write latency with write cache disable
- recover original write cache setting
- check if the write latency with cache enabled is less than that with write cache disabled
function: scripts/conformance/01_admin/features_test.py::test_features_set_invalid_ncqr
set feature Number of Queues with invalid numbers
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- If the value specified is 65,535, the controller should return an error of Invalid Field in Command.
Steps
- set feature Number of Queues to 0xffff, the command shall complete with error
- set feature Number of Queues to 0xffff0000, the command shall complete with error
- set feature Number of Queues to 0xffffffff, the command shall complete with error
function: scripts/conformance/01_admin/features_test.py::test_features_num_of_queues
set only 2 queues while to create three queues.
Reference
- NVM Express Revision 1.4a Page212:
- 5.21.1.7 Number of Queues
Steps
- create controller with only 2 queues
- check the number of queue
- create two qpairs
- cannot create any more queues
function: scripts/conformance/01_admin/features_test.py::test_features_apst_buffer_length
APST feature has a data buffer, check the length of this buffer
Reference
- NVM Express Revision 1.4a
Steps
- create 4k buffer, pvalue is all-one data
- check apst is enabled, the data structure is 256 bytes
- check the buffer 256 byte should be original value all-one data
- create 4k buffer, pvalue is all-zero data
- check apst is enabled, the data structure is 256 bytes
- check the buffer 256 byte should be original value all-zero data
function: scripts/conformance/01_admin/features_test.py::test_features_timestamp
test timestamp features
Reference
- NVM Express Revision 1.4a
- NVM Express Revision 2.0
- timestamp is cleared to 0 due to controller level reset
Steps
- check ONCS
- verify the length of the data buffer
- get current timestamp
- get the timestamp again after 1 second
- get original timestamp status
- reset and check status
- set timestamp and check status again
- get current timestamp
- get the timestamp again after 1 second
- set a max value: 0xffff_ffff_ffff
- set a min value: 0
- reset and check timestamp and status according to the Timestamp Origin
file: scripts/conformance/01_admin/format_test
function: scripts/conformance/01_admin/format_test.py::test_format_function
verify basic format function
Reference
- NVM Express Revision 1.4a March 9, 2020.
- Figure 329: Format NVM – Operation Scope
Steps
- issue a format command with nsid 0xffffffff, the command shall complete successfully
- issue a format command with nsid 1, the command shall complete successfully
function: scripts/conformance/01_admin/format_test.py::test_format_secure_erase_function
verify secure erase function
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.23 Format NVM command – NVM Command Set Specific
Steps
- issue a format command to erase data in nsid 0xffffffff, the command shall complete successfully
- issue a format command to erase data in nsid 1, the command shall complete successfully
- issue Cryptographic erase if controller support it, and the command shall complete successfully
function: scripts/conformance/01_admin/format_test.py::test_format_with_ioworker
send format command mixed with ioworker
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.23 Format NVM command – NVM Command Set Specific
Steps
- send a format command with outstanding IO, command shall complete successfully
- check the error code of format command
function: scripts/conformance/01_admin/format_test.py::test_format_and_read
send format command mixed with read io
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.23 Format NVM command – NVM Command Set Specific
Steps
- send a format command but not wait for its completion
- send a read command with an outstanding format command
- wait format complete successfully
function: scripts/conformance/01_admin/format_test.py::test_format_invalid_ses
send format command with invalid ses field
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- issue format command with invalid ses field, the command shall complete with error
function: scripts/conformance/01_admin/format_test.py::test_format_not_support_crypto_erase
send format command even if crypto erase is not supported
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- skip if controller supports crypto erase
- issue format command to do crypto erase, but the command shall complete with error
function: scripts/conformance/01_admin/format_test.py::test_format_invalid_lbaf
verify format command with invalid LBAF
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- check lbaf value
- format command with invalid lbaf, and the command shall complete with error Invalid Format.
- format to original format id
function: scripts/conformance/01_admin/format_test.py::test_format_invalid_nsid
verify format command with invalid nsid
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- issue normal format
- format which nsid is zero, will be aborted by Invalid Namespace or Format
- format which nsid is 0xfffffffb, will be aborted by Invalid Namespace or Format
- format which nsid is 0xff, will be aborted by Invalid Namespace or Format
function: scripts/conformance/01_admin/format_test.py::test_format_verify_data
verify data after format command
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- prepare data buffer and IO queue
- write data to specified lba and verify
- issue format
- the data in specified lba was formated
- repeat write data to specified lba, verify, format, and check data.
- verify crypto erase if data is erased
file: scripts/conformance/01_admin/fw_download_test
function: scripts/conformance/01_admin/fw_download_test.py::test_fw_download_out_of_order
download the firmware image out of order
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 113.
- Firmware portions may be submitted out of order to the controller.
Steps
- send firmware download commands out of order
function: scripts/conformance/01_admin/fw_download_test.py::test_fw_download_overlap
download the firmware image overlapped with each other
Reference
- NVM Express Revision 1.4a, March 9, 2020, Page 113.
- If ranges overlap, the controller may return an error of Overlapping Range.
Steps
- send firmware download commands in order
- send the same portion of the image again
function: scripts/conformance/01_admin/fw_download_test.py::test_fw_download_reset
download the image interrupted by controller reset
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 113.
- If a reset occurs between a firmware download and completion of the Firmware Commit command, then the controller shall discard all portion(s), if any, of downloaded images.
Steps
- send firmware download commands in order
- download the same portion of the image again after controller reset, commands shall complete successfully
function: scripts/conformance/01_admin/fw_download_test.py::test_fw_download_prp
Verify download command PRP offset
Reference
- NVM Express Revision 1.4a March 9, 2020, Page 113
- If ranges overlap, the controller may return an error of Overlapping Range.
Steps
- allocate buffer for fw download command
- send fw download with valid prp offset
- send fw download with invalid prp offset
file: scripts/conformance/01_admin/identify_test
function: scripts/conformance/01_admin/identify_test.py::test_identify_all_nsid
Identify command with invalid namespace will be aborted with Invalid Namespace or Format
Reference
- NVM Express Revision 1.4a March 9, 2020
Steps
- issue identify with valid namespace
- issue identify with invalid namespace will be aborted with Invalid Namespace or Format.
function: scripts/conformance/01_admin/identify_test.py::test_identify_namespace_data_structure
verify Identify Namespace data structure and Active Namespace ID list
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- issue an identify Active Namespace ID list
- check if controller contain one namespace
- issue an identify Namespace data structure
- check buffer is not null
- check NSZE = NCAP
function: scripts/conformance/01_admin/identify_test.py::test_identify_reserved_cns
Identify command with Reserved CNS will be aborted with Invalid Field in Command
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- Identify command with Reserved CNS will be aborted with Invalid Field in Command.
function: scripts/conformance/01_admin/identify_test.py::test_identify_nsze_ncap_nuse
check if Namespace Size, Namespace Capacity and Namespace Utilization are reasonable value in Identify Namespace Data Structure
Reference
- NVM Express Revision 1.4a March 9, 2020. Page249.
- The following relationship holds: Namespace Size >= Namespace Capacity >= Namespace Utilization
Steps
- read nsze, ncap, nuse value
- check if Namespace Size >= Namespace Capacity >= Namespace Utilization
- if ANA reporting supported and in inaccessible or Persistent Loss state, nuse=0
function: scripts/conformance/01_admin/identify_test.py::test_identify_controller_with_nsid
get identify controller data with nsid field
Reference
- If the namespace identifier is not used for the command and the host specifies a value from 1h to FFFFFFFFh, then the controller should abort the command with status Invalid Field in Command,
- NVM Express Revision 1.4c
- NVM Express Revision 2.0
Steps
- get identify controller data with nsid 0
- get identify controller data with invalid nsid: 1 – 0xffffffff
function: scripts/conformance/01_admin/identify_test.py::test_identify_new_cns
Identify command has to support new CNS values to access the NVM Command Set Identify specific Namespace
Reference
1.
2. NVM Express Revision Revision 2.0a, July 23rd, 2021
3. 5.17 Identify command
Steps
- skip if NVMe spec version is below 2.0
- issue identify command to read I/O Command Set specific Identify Namespace data structure
- issue identify command to read I/O Command Set specific Identify Controller data structure
- issue identify command to read Active Namespace ID list associated with the specified I/O Command Set
file: scripts/conformance/01_admin/logpage_test
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_page_id
send get log page command with valid and invalid Log Page Identifier
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 117.
- 5.14 Get Log Page command: If a Get Log Page command is processed that specifies a Log Identifier that is not supported, then the controller should abort the command with status Invalid Field in Command.
Steps
- send get log page command with valid Log Page Identifier, and commands shall complete successfully
- send get log page command with invalid Log Page Identifier, and commands shall complete with error
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_lid_0
log identifier 00h is valid in NVMe 2.0
Reference
- NVM Express Revision Revision 2.0a, July 23rd, 2021
- 5.16.1.1 Supported Log Pages (Log Identifier 00h)
- 3.1.2.1.2 Log Page Support
Steps
- skip if NVMe spec version is below 2.0
- lid 0,1,2,3,12h,13h are mandatory
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_different_size
send get log page command with different size
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 117.
Steps
- get the full smart log page
- read partial smart log page, and check data
- read data beyond smart log page, and check data
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_data_unit_read
verify the conditions for Data Units Read in SMART/Health log changes
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 123.
- 5.14.1.2 SMART / Health Information (Log Identifier 02h)
Steps
- skip if compare command is not supported
- get original Data Units Read
- send 1000 read commands
- check the Data Units Read has increased
- send 1000 compare commands
- check the Data Units Read has increased
- if the controller supports verify command, send 1000 verify commands
- the Data Units Read shall be increased
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_data_unit_write
verify the conditions for Data Units Written in SMART/Health log changes
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 123.
- 5.14.1.2 SMART / Health Information (Log Identifier 02h)
Steps
- check if the controller supports Write Uncorrectable command
- get original Data Units Written
- send 1000 write commands
- check the Data Units Written has increased
- send 1000 Write Uncorrectable commands
- check the Data Units Written has not changed
- check if the controller supports Write Zeroes command
- write the lba
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_namespace
send get log page commands with valid and invalid namespace
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 121.
- 5.14.1.2 SMART / Health Information (Log Identifier 02h)
Steps
- skip if NVMe spec version is below 1.4
- the command completes successfully and the composite temperature is not 0
- send get log page command with nsid=1: log page on a per namespace basis
- the command completes successfully and the composite temperature is not 0
- send get log page commands with invalid namespace
- check the get log page command complete with error
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_offset
Log Page Offset specifies the location within a log page to start returning data from.
Reference
- NVM Express Revision 1.4c, page 117
- 5.14 Get Log Page command
Steps
- read smart data
- read smart data with log page offset
- compare smart data with different offset, shall be different
- offset is greater than the logpage size
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_smart_composite_temperature
verify Composite Temperature and Critical Warning in SMART / Health Information
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 122.
- 5.14.1.2 SMART / Health Information (Log Identifier 02h)
Steps
- get the current composite temperature
- set feature enable all asynchronous events
- set the composite temperature threshold lower than current temperature
- check AER notification is triggered
- send a getlogpage command to get the SMART data
- check if Critical Warning bit 1 in SMART data was set
- clear event by read log page
- set the composite temperature threshold higher than current temperature
- revert to default
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_after_error
Verify Error Information will be modified after error happened.
Reference
- NVM Express Revision 1.4a.
Steps
- send admin command with opcode=0x6, cdw10=0xFF
- send get error log cmd and record nerror1
- send admin command with opcode=0x6, cdw10=0xFF
- send get error log cmd and record nerror2
- verify error count value and number of Error Information Log Entries
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_retain_asynchronous_event
send getlog page command with retain asynchronous event.
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 117:
- Retain Asynchronous Event (RAE): This bit specifies when to retain or clear an Asynchronous Event. If this bit is cleared to ‘0’, the corresponding Asynchronous Event is cleared after the command completes successfully. If this bit is set to ‘1’, the corresponding Asynchronous Event is retained (i.e., not cleared) after the command completes successfully.
Steps
- get the current composite temperature
- set feature enable all asynchronous events
- set the composite temperature threshold lower than current temperature
- check AER notification is triggered
- send a getlogpage command to get the SMART data
- check if Critical Warning bit 1 in SMART data was set
- get log page with retain asynchronous event.
- clear over Temperature Threshold event
- trigger under Temperature Threshold event, but the event type is masked
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_not_retain_asynchronous_event
send getlog page command with clear an Asynchronous Event.
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 117:
- Retain Asynchronous Event (RAE): This bit specifies when to retain or clear an Asynchronous Event. If this bit is cleared to ‘0’, the corresponding Asynchronous Event is cleared after the command completes successfully. If this bit is set to ‘1’, the corresponding Asynchronous Event is retained (i.e., not cleared) after the command completes successfully.
Steps
- get the current composite temperature
- set feature enable all asynchronous events
- get current temperature
- set the composite temperature threshold lower than current temperature
- check AER notification is triggered
- send a getlogpage command to get the SMART data
- check if Critical Warning bit 1 in SMART data was set
- send get log page command to clear an Asynchronous Event.
- clear over Temperature Threshold event
- send get log page command to clear an Asynchronous Event.
- trigger under Temperature Threshold event, the event type is masked
- send get log page command to clear an Asynchronous Event.
- clear Over Temperature Threshold event
- power cycle the drive
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_persistent_event_log
generate and verify new event log
Reference
- NVM Express Revision 2.0
Steps
- check PEL size
- fresh events in the logpage
- check events: no format event left
- format start and complete: 07/08
- check events of format, and reset is still there
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_host_initiated_telemetry
Verify host initiated telemetry
Reference
- NVM Express Revision Revision 2.0a, July 23rd, 2021
- 5.16.1.8 Telemetry Host-Initiated (Log Identifier 07h)
Steps
- check if telemetry is supported
- capture host initiated telemetry log
- get Telemetry Host-Initiated Data Generation Number
- capture host initiated telemetry log
- check if Telemetry Host-Initiated Data Generation Number is incremented each time
- get telemetry header info
- print header data
- get all data block: [1, last]
- read last block twice and compare data
- get telemetry data beyond last block, error expected
- check the generate number again
- invalid offset, error expected
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_controller_initiated_telemetry
Verify controller initiated telemetry
Reference
- NVM Express Revision Revision 2.0a, July 23rd, 2021
Steps
- check if telemetry is supported
- get telemetry header
- check telemetry header data
- print header data
- get all data block: [1, last]
- read last block twice and compare data
- check the generate number again
- invalid offset, error expected
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_telemetry_offset_not_512
If a Log Page Offset Lower value is not a multiple of 512 bytes then the controller shall return an error with Invalid Field in Command.
Reference
- NVM Express Revision Revision 2.0a, July 23rd, 2021
Steps
- issue a get Telemetry Host-Initiated Log with a multiple of 512 bytes, expect controller return Invalid Field
- issue a get Telemetry controller-Initiated Log with a multiple of 512 bytes, expect controller return Invalid Field
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_host_initiated_telemetry_data_change
The Host-Initiated Data shall not change until a subsequent Telemetry Host-Initiated Log with this bit set to ‘1’.
Reference
- NVM Express Revision Revision 2.0a, July 23rd, 2021
- 5.16.1.8 Telemetry Host-Initiated (Log Identifier 07h)
Steps
- check if telemetry is supported
- get the data area 1 size
- get host initiated telemetry data
- capture new host initiated telemetry data
- get new data area 1 size
- get another copy of telemetry data
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_nsid_0
NSID of 0h is supported in SMART/Health log
Reference
- NVM Express Revision Revision 2.0a, July 23rd, 2021
- 5.16.1.3 SMART / Health Information (Log Identifier 02h)
Steps
- skip if NVMe spec version is below 2.0
- get original Data Units Written
- send 1000 write commands
- check the Data Units Written has increased
function: scripts/conformance/01_admin/logpage_test.py::test_getlogpage_error_info_cid_ffff
The value of FFFFh should not be used as the Error Information log page uses this value to indicate an error
Reference
1.
2. NVM Express Revision Revision 2.0a, July 23rd, 2021
Steps
- issue a flush command with cid 0xffff
- issue an AER command
- create CQ and SQ
- delete SQ first
- write doorbell of the deleted SQ to cause the event Invalid Doorbell Register
- read log page to clear the event
- issue a error info log page
- check sqid and cid value in log page, expect 0xffff
- delete cq
file: scripts/conformance/01_admin/queue_test
function: scripts/conformance/01_admin/queue_test.py::test_queue_create_cq_basic_operation
create a queue and send commands on the queue
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- issue read commands on the create queue
- the read commands shall complete successfully
function: scripts/conformance/01_admin/queue_test.py::test_queue_create_cq_with_invalid_id
create IO CQ command with specified invalid Queue Identifier
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 101.
- Figure 151: if the value specified is 0h, exceeds the Number of Queues reported, or corresponds to an identifier already in use, the controller should return an error of Invalid Queue Identifier.
Steps
- create a cq which queue id is 5, and it shall complete successfully
- create a cq which queue id is 0, and it shall complete with error
- create a cq which queue id is 0xffff, and it shall complete with error
- create a cq whose queue id is larger than supported number of queue, and it shall complete with error
- create a cq which queue id is duplicated cqid, and it shall complete with error
- delete the CQ
function: scripts/conformance/01_admin/queue_test.py::test_queue_create_sq_with_invalid_id
create IO SQ command specified Invalid Queue Identifier
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 103.
- Figure 155: if the value specified is 0h, exceeds the Number of Queues reported, or corresponds to an identifier already in use, the controller should return an error of Invalid Queue Identifier.
Steps
- create a cq which queue id is 1
- create a sq which queue id is 5
- create a sq which queue id is 0, and it shall complete with error
- create a sq which queue id is 0xffff, and it shall complete with error
- create a sq which queue id is larger than supported number of queue, and it shall complete with error
- create a sq which queue id is duplicated sqid, and it shall complete with error
- delete SQ and CQ
function: scripts/conformance/01_admin/queue_test.py::test_queue_delete_cq_with_invalid_id
delete IO CQ command specified Invalid Queue Identifier
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 105.
- Figure 160: Invalid Queue Identifier: The Queue Identifier specified in the command is invalid. This error is also indicated if the Admin Completion Queue identifier is specified.
Steps
- delete a cq, normal case
- delete a cq which queue id is 0, and it shall complete with error
- delete a cq which queue id is 0xffff, and it shall complete with error
- delete a cq which queue id is larger than supported number of queue, and it shall complete with error
- delete a cq which queue id is not existed queue id, and it shall complete with error
function: scripts/conformance/01_admin/queue_test.py::test_queue_delete_sq_with_invalid_id
delete IO SQ command specified Invalid Queue Identifier
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 106.
- Figure 162:Invalid Queue Identifier: The Queue Identifier specified in the command is invalid. This error is also indicated if the Admin Submission Queue identifier is specified.
Steps
- delete a sq, and it shall complete successfully
- delete a sq which queue id is 0, and it shall complete with error
- delete a sq which queue id is 0xffff, and it shall complete with error
- delete a sq which queue id is larger than supported number of queue, and it shall complete with error
- delete a sq which queue id is not existed queue id, and it shall complete with error
function: scripts/conformance/01_admin/queue_test.py::test_queue_create_cq_with_invalid_queue_size
create IO CQ command with specified Invalid Queue Size
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 101.
- Figure 151: Queue Size (QSIZE): This field indicates the size of the Completion Queue to be created. If the size is 0h or larger than the controller supports, the controller should return an error of Invalid Queue Size.
Steps
- create cq with valid queue size, and commands shall complete successfully
- skip remaining steps if MQES is 64K
- create cq which queue size is 0xffff, the command shall complete with error
- create cq which queue size is 0x10000, the command shall complete with error
- create cq which queue size is 1, the command shall complete with error
- create cq which queue size is larger than supported Queue Size, the command shall complete with error
- create cq which queue size is 0, the command shall complete with error
- create cq with valid queue size, will complete successfully
function: scripts/conformance/01_admin/queue_test.py::test_queue_create_sq_with_invalid_queue_size
create IO SQ command specified Invalid Queue Size, shall fail with error of Invalid Queue Size
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 103.
- Figure 155:This field indicates the size of the Submission Queue to be created. If the size is 0h or larger than the controller supports, the controller should return an error of Invalid Queue Size.
Steps
- create a cq
- create sq with valid queue size
- create a sq which valid queue size is 1, the command shall complete with error
- delete the CQ
function: scripts/conformance/01_admin/queue_test.py::test_queue_create_sq_with_invalid_queue_size_mqes
create IO SQ command specified Invalid Queue Size, shall fail with error of Invalid Queue Size
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 103.
- Figure 155:This field indicates the size of the Submission Queue to be created. If the size is 0h or larger than the controller supports, the controller should return an error of Invalid Queue Size.
Steps
- skip remaining steps if MQES is 64K
- create a cq
- create a sq which valid queue size is 0xffff, the command shall complete with error
- create a sq which valid queue size is 0x10000, the command shall complete with error
- create a sq which valid queue size is larger than supported Queue Size, the command shall complete with error
- create a sq which valid queue size is 0, the command shall complete with error
- delete the CQ
function: scripts/conformance/01_admin/queue_test.py::test_queue_create_sq_physically_contiguous
If CAP.CQR is 1, CDW11.PC is 0 or a PRP Entry with a non-zero offset, shall fail with correct error code.
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 103.
- Figure 154: If CDW11.PC is set to ‘1’, then this field specifies a 64-bit base memory address pointer of the Submission Queue that is physically contiguous. The address pointer is memory page aligned (based on the value in CC.MPS) unless otherwise specified.
- If there is a PRP Entry with a non-zero offset, then the controller should return an error of PRP Offset Invalid.
Steps
- check CAP.CQR value
- issue create io sq which pc is false, will be aborted.
- issue create io sq which pc is true, will be pass.
- if prp offset is non-zero, will be aborted
function: scripts/conformance/01_admin/queue_test.py::test_queue_create_sq_non_physically_contiguous
If CAP.CQR is 0, Create IO SQ in which CDW11.PC is 0 and a PRP Entry with a non-zero offset, shall fail with error of PRP Offset Invalid.
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 103.
- Figure 154: If CDW11.PC is cleared to ‘0’, then this field specifies a PRP List pointer that describes the list of pages that constitute the Submission Queue. The list of pages is memory page aligned (based on the value in CC.MPS) unless otherwise specified.
Steps
- check if pc is required to be physically contiguous
- issue create io sq with valid prp, the command shall complete successfully
- if prp offset is non-zero, will be aborted
function: scripts/conformance/01_admin/queue_test.py::test_queue_create_cq_non_physically_contiguous
If CAP.CQR is 0, Create IO CQ in which CDW11.PC is 0 and a PRP Entry with a non-zero offset, shall fail with error of PRP Offset Invalid.
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 101.
- Figure 150.
Steps
- check if pc is required to be physically contiguous
- issue create io cq with valid prp, the command shall complete successfully
- if prp offset is non-zero, will be aborted
function: scripts/conformance/01_admin/queue_test.py::test_queue_create_cq_invalid_interrupt_vector
create cq command with a specified Invalid Interrupt Vector
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 102.
- Figure 152: In MSI-X, a maximum of 2,048 vectors are used. This value shall not be set to a value greater than the number of messages the controller supports (refer to MSICAP.MC.MME or MSIXCAP.MXC.TS). If the value is greater than the number of messages the controller supports, the controller should return an error of Invalid Interrupt Vector.
Steps
- find an invalid MSIx vector
- create IO CQ with the invalid MSIx vector, and the command shall complete with error
function: scripts/conformance/01_admin/queue_test.py::test_queue_delete_cq_before_sq
delete IO CQ before deleting its associated IO SQ
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 105.
- If there are any associated I/O Submission Queues present, then the Delete I/O Completion Queue command shall fail with a status value of Invalid Queue Deletion
Steps
- create 3 IO SQ associated to one CQ
- delete CQ first and it shall complete with error
- delete one SQ
- delete CQ and it shall complete with error
- delete all SQ
- delete CQ and it shall complete successfully
function: scripts/conformance/01_admin/queue_test.py::test_queue_delete_full_sq
delete IO SQ which has outstanding commands
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- create all possible SQ with a single CQ associated
- issue all commands to fulfill all SQ
- delete CQ first and it shall complete with error
- delete some SQ
- delete CQ and it shall complete with error
- delete some more SQ
- delete CQ and it shall complete with error
- delete the last SQ
- delete CQ and it shall complete successfully
function: scripts/conformance/01_admin/queue_test.py::test_queue_create_sq_queue_priority
check priority in create SQ command
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- create SQ with different QPRIO, and all commands shall complete successfully
function: scripts/conformance/01_admin/queue_test.py::test_queue_set_after_create_queues
set feature number of queues shall fail with Command Sequence Error if it have been issued after creation of any I/O Submission
Reference
- NVM Express Revision 1.4a March 9, 2020. Page212.
- 5.21.1.7 Number of Queues: This feature shall only be issued during initialization prior to creation of any I/O Submission and/or Completion Queues. If a Set Features command is issued for this feature after creation of any I/O Submission and/or I/O Completion Queues, then the Set Features command shall fail with status code of Command Sequence Error.
Steps
- skip if the controller does not support nvme version 1.4 or above
- create CQ and SQ
- issue a setfeature to set Number of Queues, and it shall complete with error
- delete CQ/SQ
function: scripts/conformance/01_admin/queue_test.py::test_queue_create_qpair_exceed_limit
the number of queues created exceeds the controller’s limit
Reference
- NVM Express Revision 1.4a March 9, 2020. Page212.
- 5.21.1.7 Number of Queues
Steps
- create the most queues supported by the controller
- creating a new qpair shall fail
function: scripts/conformance/01_admin/queue_test.py::test_queue_setfeature_different_cq_sq_number
set feature the number of queues, cq and sq are different
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 212.
Steps
- init controller without set number of queue
- set feature, number of cq = 2, number of sq = 4
- create all possible cq and sq
- create one more cq, shall be aborted
- create one more sq, shall be aborted
- delete queues
function: scripts/conformance/01_admin/queue_test.py::test_queue_invalid_prp_offset
Verify create IO CQ with invalid PRP offset.
Reference
- NVM-Express-1_4-2019.06.10-Ratified. Page 101.
- If there is a PRP Entry with a non-zero offset, then the controller should return an error of PRP Offset Invalid.
Steps
- Spec NVM-Express-1_4-2019.06.10-Ratified
- Figure 149: In both cases the PRP Entry shall have an offset of 0h.
- send PRP with invalid offset, should get ERROR status: 00/13
function: scripts/conformance/01_admin/queue_test.py::test_queue_cq_sqhd
check sqhd in each CQ entry
Reference
- NVM-Express-1_4-2019.06.10-Ratified. Page 101.
Steps
- send one admin command and get the sqhd in its CQE
- send one more admin command, and the sqhd should be increased by 1
- send one more admin command after an AER, and the sqhd should be increased by 2
function: scripts/conformance/01_admin/queue_test.py::test_queue_sq_fuse_reserved_value
fuse field shall be reserved
Reference
- NVM Express Revision 1.4a March 9, 2020
Steps
- set FUSE field to 0x3, a reserved value
- check CQE for error Invalid Field in Command
function: scripts/conformance/01_admin/queue_test.py::test_queue_enabled_msix_interrupt_all
verify MSIx interrupt on all qpairs
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 297
- MSI-X also allows each interrupt to send a unique message data corresponding to the vector.
Steps
- create all qpairs
- read LBA0 with each qpair
- check MSIx interrupt assertion
- create qpair with illegal sqid, error is expected
file: scripts/conformance/01_admin/sanitize_test
function: scripts/conformance/01_admin/sanitize_test.py::test_sanitize_operations_basic
controller shall update the Sanitize Status log during Sanitize progress
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 237.
- Shall clear any outstanding Sanitize Operation Completed asynchronous event or Sanitize Operation Completed With Unexpected Deallocation asynchronous event; Shall update the Sanitize Status log (refer to section 5.14.1.16.2);
Steps
- write data
- verify data before sanitize
- issue block erase sanitize
- check if Sanitize Progress is updated and AER is triggered
- check if bit2:0 in Sanitize Status is 1(the most recent sanitize operation completed successfully)
- check if bit8 in Sanitize Status is 1 (since the most recent successful sanitize operation.)
- check if SCDW10 is the value of the Command Dword 10 field of the Sanitize command
- verify data after sanitize
function: scripts/conformance/01_admin/sanitize_test.py::test_sanitize_crypto_erase_progress
Crypto Erase Sanitize operation progress
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 359.
- The Crypto Erase sanitize operation alters user data by changing the media encryption keys for all locations on the media within the NVM subsystem in which user data may be stored.
Steps
- check if controller support Crypto Erase
- write data and verify
- issue a Crypto Erase sanitize command
- check if Sanitize Progress is updated and AER is triggered
- check if data is erased
- check if bit2:0 in Sanitize Status is 1(the most recent sanitize operation completed successfully)
- check if bit8 in Sanitize Status is 1 (since the most recent successful sanitize operation)
- check if SCDW10 is the value of the Command Dword 10 field of the Sanitize command
function: scripts/conformance/01_admin/sanitize_test.py::test_sanitize_abort_non_allowed_command
the Sanitize progress will abort any command not allowed
Reference
- NVM Express Revision 1.4a March 9, 2020. Page237.
- Shall abort any command (submitted or in progress) not allowed during a sanitize operation with a status of Sanitize In Progress (refer to section 8.15.1); Firmware Commit, Firmware Image Download, Format NVM, Sanitize will be aborted. And all NVM command will be abort.
Steps
- issue a Block Erase sanitize command
- if sanitize operation is finished, skip test
- abort sanitize command
- abort dst command
- abort fw download command
- abort fw commit command
- abort format command
- abort flush command
- abort write command
- abort read command
- wait sanitize operation complete
- check if Sanitize Progress is updated and AER is triggered
function: scripts/conformance/01_admin/sanitize_test.py::test_sanitize_not_abort_allowed_command
the Sanitize progress will not abort any command allowed
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 362.
- Figure 484. Abort, AER, Create CQ/SQ, Delete CQ/SQ, DST, Get features, Get log page, Identify, Keep Alive, NVMe-MI Receive, NVMe-MI Send are allowed when sanitize progress.
Steps
- issue a Block Erase sanitize command
- if sanitize operation is finished, skip test
- Create IO CQ and IO SQ
- Delete IO CQ and IO SQ
- issue setfeatures and it shall complete successfully
- issue getfeatures and it shall complete successfully
- issue identify command and it shall complete successfully
- check if Sanitize Progress is updated
- check if bit2:0 in Sanitize Status is 1 for the most recent successful sanitize operation
- check if bit8 in Sanitize Status is 1 for the most recent successful sanitize operation
- check if SCDW10 is the value of the Command Dword 10 field of the Sanitize command
function: scripts/conformance/01_admin/sanitize_test.py::test_sanitize_not_successful_completion
send an invalid sanitize command and check Sanitize Status log page and alter user data
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.24 Sanitize command – NVM Command Set Specific
Steps
- write data and verify data
- read log page value before issue sanitize
- send a sanitize command with Reserved Sanitize Action
- check data have not been changed
- check log page have not been updated.
function: scripts/conformance/01_admin/sanitize_test.py::test_sanitize_nvme_reset
Block Erase Sanitize operation is not able to be aborted and continue after NVMe Reset
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 358.
- Once started, a sanitize operation is not able to be aborted and continues after a Controller Level Reset including across power cycles.
Steps
- issue a Block Erase sanitize command
- if sanitize operation is finished, skip test
- controller reset
- check if Sanitize Progress is updated and AER is triggered
function: scripts/conformance/01_admin/sanitize_test.py::test_sanitize_not_support_type
Controller shall abort the unsupported sanitize command with a status of Invalid Field in Command.
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 237:
- If an unsupported sanitize operation type is selected by a Sanitize command, then the controller shall abort the command with a status of Invalid Field in Command.
Steps
- check Sanitize Capabilities value in identify
- if not support Crypto Erase
- if not support Block Erase
- if not support Overwrite
- Reserved Sanitize Action values
function: scripts/conformance/01_admin/sanitize_test.py::test_sanitize_abort_by_fw_activation
If a firmware activation with reset is pending, then the controller shall abort any Sanitize command.
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 237:
- If a firmware activation with reset is pending, then the controller shall abort any Sanitize command.
Steps
- skip if the firwmare slot 1 is read only
- issue fw commit command
- issue sanitize command
function: scripts/conformance/01_admin/sanitize_test.py::test_sanitize_no_deallocate
Verify data will be deallocated after Sanitize if No Deallocate After Sanitize field cleared to 0 or set to ‘1’ and the No-Deallocate Inhibited bit is set to ‘1’.
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 239:
- No Deallocate After Sanitize: If set to ‘1’ and the No-Deallocate Inhibited bit (refer to Figure 247)is cleared to ‘0’, then the controller shall not deallocate any logical blocks as a result of successfully completing the sanitize operation. If:
- a) cleared to ‘0’; or
- b) set to ‘1’ and the No-Deallocate Inhibited bit is set to ‘1’,
- then the controller should deallocate logical blocks as a result of successfully completing the
- sanitize operation.
Steps
- only test in 1.4
- check if support sanitize
- set NODRM
- write data and verify
- issue a sanitize command, and No Deallocate After Sanitize field set to 1
- check sanitize status in log page and AER
- check if data is deallocated
- check sanitize status
- clear NODRM
function: scripts/conformance/01_admin/sanitize_test.py::test_sanitize_exit_failure_mode
A Sanitize command specifying an Action set to 001b shall be successful if the most recent sanitize operation did not fail
Reference
- NVM Express Revision Revision 2.0a, July 23rd, 2021.section 5.24
Steps
- check if support sanitize
- issue block erase sanitize
- check if Sanitize Progress is updated and AER is triggered
- check if bit2:0 in Sanitize Status is 1(the most recent sanitize operation completed successfully)
- check if bit8 in Sanitize Status is 1 (since the most recent successful sanitize operation.)
- check if SCDW10 is the value of the Command Dword 10 field of the Sanitize command
- verify data after sanitize
- issue an exit failure mode Sanitize command
- check log page again, log page is not changed
function: scripts/conformance/01_admin/sanitize_test.py::test_sanitize_and_flush
a Flush command may successful even during a sanitize operation
Reference
- NVM Express Revision Revision 2.0a, July 23rd, 2021.section 5.24
Steps
- if volatile cache is not present
- get the original write cache setting
- disable the write cache and verify the feature is set correctly
- issue block erase sanitize
- flush during sanitize
- check if Sanitize Progress is updated and AER is triggered
- check if bit2:0 in Sanitize Status is 1(the most recent sanitize operation completed successfully)
- check if bit8 in Sanitize Status is 1 (since the most recent successful sanitize operation.)
- check if SCDW10 is the value of the Command Dword 10 field of the Sanitize command
folder: scripts/conformance/02_nvm
file: scripts/conformance/02_nvm/compare_test
function: scripts/conformance/02_nvm/compare_test.py::test_compare_lba_0
verify the Starting LBA and Number of Logical Blocks fields of the compare command
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 255.
- The Compare command reads the logical blocks specified by the command from the medium and compares the data read to a comparison data buffer transferred as part of the command.
Steps
- check if the compare command is supported
- get the maximum number of lba
- prepare data to be compared
- send compare commands with different LBA, and the command shall complete with error
- send compare commands with different data, and the command shall complete with error
- recover data buffer to original data
- send compare commands with different nlb, and the command shall complete with error
- send compare commands with invalid LBA, and the command shall complete with error
function: scripts/conformance/02_nvm/compare_test.py::test_compare_invalid_nsid
issue compare with invalid nsid
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 247.
- An invalid NSID is any value that is not a valid NSID and is also not the broadcast value.
Steps
- check if the compare command is supported
- issue compare with invalid nsid
- check the compare command failed to execute
function: scripts/conformance/02_nvm/compare_test.py::test_compare_fused_operations
compare and write fused operation
Reference
- NVM Express Revision 1.4c
- 6.2 Fused Operations
Steps
- skip test if compare and write fused operation is not supported
- send separated write commands
- send separated compare commands with wrong data
- send separated compare commands
- send separated command with illegal fuse
- send combined commands with illegal fuse
- send correct compare/write fused command
- send compare/write fused command with wrong data
- send correct compare/write fused command with correct data
- send compare/write fused command with wrong lba
- send compare/write fused command with wrong lba
- compare the new data in fused command
- compare the new data in separated command
- send fused commands with other normal commands
- send fused commands with other wrong commands
- send 2 pairs of fused commands
- send 2 pairs of fused commands, one pass, another wrong
function: scripts/conformance/02_nvm/compare_test.py::test_compare_write_mixed
test compare and write in ioworker
Reference
- NVM Express Revision 1.4c
Steps
- check if the compare command is supported
- format
- test write and compare without token
- test write and compare without token in ioworker
- enable token and test compare
file: scripts/conformance/02_nvm/copy_test
function: scripts/conformance/02_nvm/copy_test.py::test_copy_basic
send copy command and verify the copy data
Reference
- NVM Command Set Specification 1.0b January 6, 2022. Page 22.
- The Copy command is used by the host to copy data from one or more source logical block ranges to a
- single consecutive destination logical block range.
Steps
- write lba 0-32
- copy lba 0-32 to 32-64
- copy lba 0-32, 32-64 to 64-96, 96-128
- create buffer to read data copied
- read lba 0-32
- read lba 32-64
- read lba 64-96
- read lba 96-128
- compare data
function: scripts/conformance/02_nvm/copy_test.py::test_copy_smart
copy cmd will affects SMART Host Read/Write Commands field, but not affects Data Units Read/Written.
Reference
- NVM Command Set Specification 1.0b January 6, 2022. Page 8.
- 1.4.2.3 SMART Data Units Read Command: The Compare command, Read command, and Verify command
- 1.4.2.4 SMART Host Read Command: The Compare command, Copy command, and Read command
Steps
- get original Data Units Read/Written and Host Read/Write Commands
- copy lba 0-32, 32-64 to 64-96, 96-128
- check the Data Units Read/Write not increased, Host Read/Write Commands has increased
function: scripts/conformance/02_nvm/copy_test.py::test_copy_format_1
the copy descriptor format type of the Source range entries
Reference
- NVM Command Set Specification 1.0b January 6, 2022. Page 24.
- Descriptor Format: Specifies the type of the Copy Descriptor Format that is used. The Copy Descriptor
- Format specifies the starting LBA, number of logical blocks, and parameters associated with the read
- portion of the operation.
Steps
- check if copy format 1 is supported
- copy lba 0-32 to 32-64, format=0
- copy lba 0-32 to 32-64, format=1
- copy lba 0-32 to 32-64, set copy range format=0, copy format=1
- copy lba 0-32 to 32-64, set copy range format=1 copy format=0
function: scripts/conformance/02_nvm/copy_test.py::test_copy_invalid_lba
verify the copy command of the starting LBA under boundary conditions
Reference
- NVM Command Set Specification 1.0b January 6, 2022.
Steps
- read ncap value in identify
- copy lba 0-1 to ncap
- issue a copy command, slba is ncap-1, nlb is 1.
- issue a copy command, source range is OOR.
- copy slba and lnb more than ncap, will be aborted with LBA Out of Range
function: scripts/conformance/02_nvm/copy_test.py::test_copy_max_namespace_size
send copy command with invalid startling LBA will be aborted with LBA Out of Range
Reference
- NVM Command Set Specification 1.0b January 6, 2022.
Steps
- read nsze and ncap value, and check if both of them are equal.
- copy over nsze, will be aborted with LBA Out of Range.
function: scripts/conformance/02_nvm/copy_test.py::test_copy_fua
send copy command with FUA field enabled
Reference
- NVM Command Set Specification 1.0b January 6, 2022.
Steps
- send copy commands with FUA enabled, all commands shall complete successfully
function: scripts/conformance/02_nvm/copy_test.py::test_copy_invalid_nsid
send copy command with invalid nsid will be aborted with Invalid Namespace or Format
Reference
- NVM Command Set Specification 1.0b January 6, 2022.
Steps
- issue a copy command with invalid namespace
- check if copy command was aborted with Invalid Namespace or Format
function: scripts/conformance/02_nvm/copy_test.py::test_copy_invalid_nsid_lba
copy command with invalid nsid and invalid SLBA
Reference
- NVM Command Set Specification 1.0b January 6, 2022.
Steps
- read ncap and mdts value
- prepare copy range buffer
- issue a copy command with invalid namespace and invalid SLBA
- check the error code
function: scripts/conformance/02_nvm/copy_test.py::test_copy_max_nr
If the number of Source Range entries (i.e., the value in the NR field) is greater than the value in the MSRC field (refer to Figure 97),
Reference
1.
2. NVM Command Set Specification 1.0b January 6, 2022.
Steps
- read msrc value in identify, 0 base
- issue a copy command with maximum nr=msrc
function: scripts/conformance/02_nvm/copy_test.py::test_copy_invalid_nr
If the number of Source Range entries (i.e., the value in the NR field) is greater than the value in the MSRC field (refer to Figure 97),
Reference
1.
2. NVM Command Set Specification 1.0b January 6, 2022.
Steps
- read msrc value in identify, and increase to an invalid size
- check if msrc supports the maximum entries
- send the copy command, and it is expceted to be aborted
function: scripts/conformance/02_nvm/copy_test.py::test_copy_mssrl
If a valid Source Range Entry specifies a Number of Logical Blocks field that is greater than the value in the MSSRL field (refer to Figure 97),
Reference
1.
2. NVM Command Set Specification 1.0b January 6, 2022.
Steps
- read mssrl value in identify
- copy 0-mssrl to dest_bla
- copy with lba_count=mssrl+1
function: scripts/conformance/02_nvm/copy_test.py::test_copy_mcl
If the sum of all Number of Logical Blocks fields in all Source Range entries is greater than the value in the MCL field (refer to Figure 97),
Reference
1.
2. NVM Command Set Specification 1.0b January 6, 2022.
Steps
- read mcl value in identify
- copy with number of source range is mcl
- copy lba 0-32*mcl to dest_lba, range count is mcl.
- copy with number of source range is mcl+1
- send the copy command, and it is expceted to be aborted
function: scripts/conformance/02_nvm/copy_test.py::test_copy_multi_source
copy data from multiple different places
Reference
- NVM Command Set Specification 1.0b January 6, 2022.
Steps
- check msrc
- check mcl
- check mssrl
- write data to differnt lba region, and copy to a single region
- read copied data
- compare data
function: scripts/conformance/02_nvm/copy_test.py::test_copy_write_uncorrectable
copy the LBA written uncorrectable, will be aborted with Unrecovered Read Error status
Reference
- NVM Command Set Specification 1.0b January 6, 2022.
- The Write Uncorrectable command is used to mark a range of logical blocks as invalid. When the specified logical block(s) are read after this operation, a failure is returned with Unrecovered Read Error status.
Steps
- check if write uncorrectable command is supported
- prepare buffer
- issue a write uncorrectable command, will complete successfully
- send read commands on uncorrectable LBAs, the command shall complete with error Unrecovered Read Error
- issue a write command, the command shall complete successfully
- issue a read command, the command shall complete successfully
- verify data
function: scripts/conformance/02_nvm/copy_test.py::test_copy_ioworker
copy date with ioworker, mixed with read and write
Reference
- NVM Command Set Specification 1.0b January 6, 2022.
Steps
- copy date with read and write
file: scripts/conformance/02_nvm/deallocate_test
function: scripts/conformance/02_nvm/deallocate_test.py::test_deallocate_and_write
the logical block can be written and read after deallocated
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 259.
- The value read from a deallocated logical block shall be deterministic; specifically, the value returned by subsequent reads of that logical block shall be the same until a write operation occurs to that logical block.
Steps
- prepare data buffer
- deallocate logical blocks
- write data into deallocated logical block and verify data
- calcuate the start LBA address of the trim range
- trim LBA range
- read the LBA range and verify data
function: scripts/conformance/02_nvm/deallocate_test.py::test_deallocate_out_of_range
Dataset Management with out of range will be aborted
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- check ncap in identify
- deallocate logical blocks of whole drive, and the command shall complete successfully
- deallocate logical blocks out of range, and the command shall complete with error
function: scripts/conformance/02_nvm/deallocate_test.py::test_deallocate_nr_maximum
the number of ranges in the dsm command exceeds the limit, the dsm will be aborted
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 258.
- The definition of the Dataset Management command Range field is specified in Figure 366. The maximum case of 256 ranges is shown.
Steps
- deallocate 256 logical blocks
- deallocate more than 256 logical blocks, will be aborted
function: scripts/conformance/02_nvm/deallocate_test.py::test_deallocate_correct_range
the data for logical blocks that are not deallocated are not changed
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 257.
- The data and metadata for logical blocks that are not deallocated by the NVM subsystem are not changed as the result of a Dataset Management command.
Steps
- write a range of logical blocks
- deallocate middle logical block
- check if other areas are not deallocated
function: scripts/conformance/02_nvm/deallocate_test.py::test_deallocate_multiple_range
deallocate multiple ranges
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 258.
- The data that the Dataset Management command provides is a list of ranges with context attributes.
Steps
- write a range of logical blocks
- deallocate multiple ranges data
- check if the data that are not deallocated are not changed
- check if ranges that are deallocated can be written and read
function: scripts/conformance/02_nvm/deallocate_test.py::test_deallocate_mixed
trim mixed with other different IOs
Reference
- NVM Express Revision 1.4a March 9, 2020, Page 259.
Steps
file: scripts/conformance/02_nvm/flush_test
function: scripts/conformance/02_nvm/flush_test.py::test_flush_with_read_write
The Flush command is used to request that the contents of volatile write cache be made non-volatile.
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 260.
- The Flush command is used to request that the contents of volatile write cache be made non-volatile.
Steps
- prepare data buffer and IO queue
- issue write command
- issue flush command
- verify data
function: scripts/conformance/02_nvm/flush_test.py::test_flush_vwc_check
controllers shall not set bits 2:1 in the VWC field to the value of 00b
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 260.
- Controllers compliant with versions 1.4 and later of this specification shall not set bits 2:1 in the VWC field to the value of 00b.
- If bits 2:1 are set to 11b in the VWC field (refer to Figure 247) and the specified NSID is FFFFFFFFh, then the Flush command applies to all namespaces attached to the controller processing the Flush command. If bits 2:1 are set to 10b in the VWC field and the specified NSID is FFFFFFFFh, then the controller fails the command with status code Invalid Namespace or Format.
Steps
- read vwc and vs value
- verify bits 2:1 in VWC field is not zero if version is 1.4 and later
- check if NSID 0xffffffff is not supported
file: scripts/conformance/02_nvm/read_test
function: scripts/conformance/02_nvm/read_test.py::test_read_large_lba
verify the read command of the starting LBA under boundary conditions
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- read ncap value in identify
- issue read command, slba is ncap-1, nlb is 1, and the command shall complete successfully
- read slba and lnb more than ncap, will be aborted with LBA Out of Range
function: scripts/conformance/02_nvm/read_test.py::test_read_max_namespace_size
send read command with invalid starting lba
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- read nsze and ncap value, and check if both of them are equal.
- read over nsze, will be aborted with LBA Out of Range.
function: scripts/conformance/02_nvm/read_test.py::test_read_fua
verify the read command with FUA field enabled
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 261.
- Force Unit Access (FUA): If set to ‘1’, then for data and metadata, if any, associated with logical blocks specified by the Read command, the controller shall:
-
- commit that data and metadata, if any, to non-volatile media; and
-
- return the data, and metadata, if any, that are read from non-volatile media.
Steps
- read with FUA enabled, and commands shall complete successfully
function: scripts/conformance/02_nvm/read_test.py::test_read_bad_number_blocks
read exceed maximum data transfer size will be aborted with Invalid Field in Command
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- read and check mdts value
- issue read command with slba is not more than mdts, normal case
- issue read command with slba is more than mdts, read command will be aborted with Invalid Field in Command.
- issue read command with valid nlb, and commands shall complete successfully
function: scripts/conformance/02_nvm/read_test.py::test_read_valid
verify data consistency
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- prepare data buffer and IO queue
- issue write and read command
- wait commands complete and verify data
function: scripts/conformance/02_nvm/read_test.py::test_read_invalid_nsid
read command with invalid nsid will be aborted with Invalid Namespace or Format
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- issue a read command with invalid namespace
- ring doorbell and wait command completes
- check if read command was aborted with Invalid Namespace or Format
function: scripts/conformance/02_nvm/read_test.py::test_read_invalid_nlb
read command with invalid nlb will be aborted with Invalid Field in Command
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- skip this test if the MDTS is too large
- issue a read command with invalid nlb
- check if read command was aborted with Invalid Field in Command.
function: scripts/conformance/02_nvm/read_test.py::test_read_invalid_nsid_lba
read command with invalid nsid and invalid SLBA
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- read ncap and mdts value
- issue a read command with invalid namespace and invalid SLBA
- check the error code
function: scripts/conformance/02_nvm/read_test.py::test_read_ioworker_consistency
get read iops per second
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- send read IO in ioworker and get the IOPS of every second
function: scripts/conformance/02_nvm/read_test.py::test_read_ioworker_trim_mixed
read mixed with trim
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- send read and trim commands in ioworker
function: scripts/conformance/02_nvm/read_test.py::test_read_different_io_size_and_count
read with different lba and nlb
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- allcoate all DMA buffers for IO commands
- send and reap all IO command dwords
file: scripts/conformance/02_nvm/verify_test
function: scripts/conformance/02_nvm/verify_test.py::test_verify_large_lba
send verify command which nlb exceeds the size of the namespace, will be aborted with Out of Range
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 274.
Steps
- read Namespace Capacity value
- issue a verify command, slba = ncap -1, nlb = 1, it shall complete successfully
- issue a verify command, slba = ncap, nlb = 1, it shall complete with error
- issue a verify command, slba = ncap + 1, nlb = 1, it shall complete with error
- issue a verify command, slba = ncap-1, nlb = 2, it shall complete with error
- issue a verify command, slba = 0xffffffff00000000, nlb = 1, it shall complete with error
function: scripts/conformance/02_nvm/verify_test.py::test_verify_valid
verify valid verify command
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 274.
- The Verify command is used to set a range of logical blocks to zero.
Steps
- prepare data buffer and IO queue
- write data and verify
- define a callback function for verify
- issue a verify command
- wait commands complete and verify data
function: scripts/conformance/02_nvm/verify_test.py::test_verify_invalid_nsid
verify command with invalid nsid will be abort with Invalid Namespace or Format
Reference
- NVM Express Revision 1.4a March 9, 2020, Page 247.
Steps
- issue a verify which namespace is 0xff
- check if status is 0x000b
function: scripts/conformance/02_nvm/verify_test.py::test_verify_nlb
verify command has no limit on mdts
Reference
- NVM Express Revision 1.4a March 9, 2020, Page 275.
Steps
- check if controller supports verify.
- read mdts
- issue a verify which namespace is 1
- set verify nlb larger than mdts
- send command and trigger the doorbell
- check if status is success
function: scripts/conformance/02_nvm/verify_test.py::test_verify_invalid_nsid_lba
verify command with invalid namespace and slba will be abort with Invalid Namespace or Format
Reference
- NVM Express Revision 1.4a March 9, 2020, Page 275.
Steps
- read ncap and mdts
- issue a verify, namespace = 0xff, slba = capacity
- write sq.tail
- check the error code
function: scripts/conformance/02_nvm/verify_test.py::test_verify_uncorrectable_lba
verify the LBA written uncorrectable, will be aborted with Unrecovered Read Error status
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 273.
- The Write Uncorrectable command is used to mark a range of logical blocks as invalid. When the specified logical block(s) are read after this operation, a failure is returned with Unrecovered Read Error status.
Steps
- skip if write uncorrectable command is not supported
- issue a write uncorrectable command, will complete successfully
- send read commands on uncorrectable LBAs
- the command shall complete with error Unrecovered Read Error
- issue a write command, the command shall complete successfully
- issue a read command, the command shall complete successfully
file: scripts/conformance/02_nvm/write_test
function: scripts/conformance/02_nvm/write_test.py::test_write_large_lba
verify the write command of the starting LBA under boundary conditions
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- read ncap value in identify
- issue a write command, slba is ncap-1, nlb is 1.
- write slba and nlb beyond the ncap, will be aborted with LBA Out of Range
function: scripts/conformance/02_nvm/write_test.py::test_write_max_namespace_size
send write command with invalid SLAB will be aborted with LBA Out of Range
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- read nsze and ncap value, and check if both of them are equal.
- write over nsze, will be aborted with LBA Out of Range.
function: scripts/conformance/02_nvm/write_test.py::test_write_fua
send write command with FUA field enabled
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- send write commands with FUA enabled, all commands shall complete successfully
function: scripts/conformance/02_nvm/write_test.py::test_write_bad_number_blocks
send write command longer than MDTS
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- read mdts value
- send write commands with slba not more than mdts, the commands shall complete successfully
- slba is more than mdts, write command will be aborted with Invalid Field
- issue write command which nlb is less than mdts, it shall complete successfully
function: scripts/conformance/02_nvm/write_test.py::test_write_valid
verify read and written data consistency
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- prepare data buffer and IO queue
- issue write and read command
- wait commands complete and verify data
function: scripts/conformance/02_nvm/write_test.py::test_write_invalid_nsid
send write command with invalid nsid will be aborted with Invalid Namespace or Format
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- issue a write command with invalid namespace
- check if read command was aborted with Invalid Namespace or Format
function: scripts/conformance/02_nvm/write_test.py::test_write_invalid_nlb
write command with invalid nlb will be aborted with Invalid Field in Command
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- issue a write command with invalid nlb
- check if write command was aborted with Invalid Field in Command.
function: scripts/conformance/02_nvm/write_test.py::test_write_invalid_nsid_lba
write command with invalid nsid and invalid SLBA
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- read ncap and mdts value
- issue a write command with invalid namespace and invalid SLBA
- check the error code
function: scripts/conformance/02_nvm/write_test.py::test_write_ioworker_different_op_mixed
mixed different operatios in one ioworker
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- send read/write/flush/trim commands in one ioworker
function: scripts/conformance/02_nvm/write_test.py::test_write_ioworker_consistency
get write iops per second
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- send write commands in ioworker and get the IOPS of every second
function: scripts/conformance/02_nvm/write_test.py::test_write_followed_by_read
mix write and read commands
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- write data to a lba
- read data from the same lba
- repeat for 10000 times with different lbas
function: scripts/conformance/02_nvm/write_test.py::test_write_fua_unaligned
write data to unaligned lba with fua mode
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- write data with unaligned FUA writes
- verify data
function: scripts/conformance/02_nvm/write_test.py::test_write_cache_disable
write with write cache disabled
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- precondition
- write without cache
- seq write size is less than 32KiB * 999Cmd
- unsafe shutdown occur
- reboot
- seq write size is more than 32Kib * 1010cmd
- shutdown occur
- reboot
- verify data
file: scripts/conformance/02_nvm/write_uncorrectable_test
function: scripts/conformance/02_nvm/write_uncorrectable_test.py::test_write_uncorrectable_large_lba
verify the write uncorrectable command of the starting LBA under boundary conditions
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- read ncap value
- issue write uncorrectable command, slba is ncap-1, nlb is 1.
- issue write uncorrectable command with slba and lnb more than ncap, will be aborted with LBA Out of Range
function: scripts/conformance/02_nvm/write_uncorrectable_test.py::test_write_uncorrectable_deallocate
verify deallocate after write uncorrectable
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- check if controller supports deallocate
- prepare buffer
- issue a write uncorrectable command
- issue a deallocate command
- issue a write command
function: scripts/conformance/02_nvm/write_uncorrectable_test.py::test_write_uncorrectable_after_deallocate
verify deallocate before write uncorrectable
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- check if controller supports deallocate
- issue a deallocate command, command shall complete successfully
- issue a write uncorrectable command, command shall complete successfully
- issue a write command, command shall complete successfully
function: scripts/conformance/02_nvm/write_uncorrectable_test.py::test_write_uncorrectable_read
read the LBA written uncorrectable, will be aborted with Unrecovered Read Error status
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 273.
- The Write Uncorrectable command is used to mark a range of logical blocks as invalid. When the specified logical block(s) are read after this operation, a failure is returned with Unrecovered Read Error status.
Steps
- prepare buffer
- issue a write uncorrectable command, will complete successfully
- send read commands on uncorrectable LBAs
- the command shall complete with error Unrecovered Read Error
- issue a write command, the command shall complete successfully
- issue a read command, the command shall complete successfully
file: scripts/conformance/02_nvm/write_zeroes_test
function: scripts/conformance/02_nvm/write_zeroes_test.py::test_write_zeroes_large_lba
write zeroes which NLB exceeds the size of the namespace, will be aborted with Out of Range
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 274.
Steps
- read Namespace Capacity value
- issue a write zeros command, slba = ncap -1, nlb = 1, it shall complete successfully
- issue a write zeros command, slba = ncap, nlb = 1, it shall complete with error
- issue a write zeros command, slba = ncap + 1, nlb = 1, it shall complete with error
- issue a write zeros command, slba = ncap-1, nlb = 2, it shall complete with error
- issue a write zeros command, slba = 0xffffffff00000000, nlb = 1, it shall complete with error
function: scripts/conformance/02_nvm/write_zeroes_test.py::test_write_zeroes_valid
verify valid write zeroes command
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 274.
- The Write Zeroes command is used to set a range of logical blocks to zero.
Steps
- prepare data buffer and IO queue
- write data and verify
- define a callback function for write zeroes
- issue a write zeroes command
- wait commands complete and verify data
function: scripts/conformance/02_nvm/write_zeroes_test.py::test_write_zeroes_invalid_nsid
write zeroes command with invalid nsid will be abort with Invalid Namespace or Format
Reference
- NVM Express Revision 1.4a March 9, 2020, Page 247.
Steps
- issue a write zeroes which namespace is 0xff
- check if status is 0x000b
function: scripts/conformance/02_nvm/write_zeroes_test.py::test_write_zeroes_nlb
verify Write zeroes command which nlb is mdts
Reference
- NVM Express Revision 1.4a March 9, 2020, Page 275.
Steps
- read mdts
- issue a write zeroes which namespace is 0xff
- check if status is 0x0000
function: scripts/conformance/02_nvm/write_zeroes_test.py::test_write_zeroes_invalid_nsid_lba
write zeroes command with invalid namespace and slba will be abort with Invalid Namespace or Format
Reference
- NVM Express Revision 1.4a March 9, 2020, Page 275.
Steps
- read ncap and mdts
- issue a write zeroes, namespace = 0xff, slba = mdts
- check the error code
function: scripts/conformance/02_nvm/write_zeroes_test.py::test_write_zeroes_data_unit_write
Data Units Written field is not impacted by the Write Zeroes command
Reference
- 5.16.1.3 SMART / Health Information (Log Identifier 02h)
Steps
- skip if NVMe spec version is below 1.4
- get original Data Units Written
- send Write Zeroes commands
- check the Data Units Written has not changed
folder: scripts/conformance/03_features/hmb
file: scripts/conformance/03_features/hmb/1_basic_test
function: scripts/conformance/03_features/hmb/1_basic_test.py::test_hmb_write_read
io tests with standard HMB configuration
Reference
- NVM Express Revision 1.4a, March 9, 2020. Page 218.
Steps
- enable hmb
- test different kinds of IO with hmb enabled
file: scripts/conformance/03_features/hmb/2_protocol_test
function: scripts/conformance/03_features/hmb/2_protocol_test.py::test_hmb_support
Host Memory Buffer Preferred Size shall be greater than or equal to the Host Memory Buffer Minimum Size
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 180:
- Host Memory Buffer Preferred Size (HMPRE): This field indicates the preferred size
- that the host is requested to allocate for the Host Memory Buffer feature in 4 KiB units.
- This value shall be greater than or equal to the Host Memory Buffer Minimum Size.
Steps
- read Host Memory Buffer Preferred Size and Host Memory Buffer Minimum Size value in identify
- check HMPRE shall be greater than or equal to HMMIN
- check if HMPRE is more than 64M
function: scripts/conformance/03_features/hmb/2_protocol_test.py::test_hmb_command_sequence
If hmb is enabled, then a set feature command to enable hmb shall fail with a status code of Command Sequence Error
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 213:
- If the host memory buffer is enabled, then a Set Features command to enable the host memory buffer (i.e.,
- the EHM bit (refer to Figure 291) set to ‘1’) shall fail with a status code of Command Sequence Error.
Steps
- set feature to enable hmb
- EHM bit set to 1 shall fail with a status code of Command Sequence Error when hmb was enabled.
- set feature to disable hmb
- set feature command to disable hmb can be passed when hmb is disabled
function: scripts/conformance/03_features/hmb/2_protocol_test.py::test_hmb_size_invalid
try to enable HMB with invalid parameters in setfeatures command
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer
Steps
- allocate host memory
- enable hmb
- invalid Host Memory Buffer Size, command should fail with error Invalid Field in Command
- enable hmb with correct parameters
- check hmb is enabled
- disable hmb
function: scripts/conformance/03_features/hmb/2_protocol_test.py::test_hmb_entry_count_invalid
try to enable HMB with invalid parameters in setfeatures command
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer
Steps
- allocate host memory
- enable hmb
- invalid Host Memory Descriptor List Entry Count, command should fail with error Invalid Field in Command
- enable hmb with correct parameters
- check hmb is enabled
- disable hmb
function: scripts/conformance/03_features/hmb/2_protocol_test.py::test_hmb_format_sanitize
Run format command and sanitize command without error when host enable hmb.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb
- run ioworker
- get current LBA format id
- issue a format command with nsid 0xffffffff, the command shall complete successfully
- issue a format command with nsid 1, the command shall complete successfully
- run ioworker
- skip if sanitize is not supported
- issue block erase sanitize
- run ioworker tests
function: scripts/conformance/03_features/hmb/2_protocol_test.py::test_hmb_enable_disable_with_ioworker
Enable and disable hmb repeatedly within ioworker.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable and disable hmb stress within ioworker.
function: scripts/conformance/03_features/hmb/2_protocol_test.py::test_hmb_data_consistency
Verify data consistency between enable and disable hmb
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb
- run ioworker
- read data
- disable hmb
- verify data consistency after disable hmb
- run ioworker
- read data
- enable hmb
- verify data consistency after enable hmb
file: scripts/conformance/03_features/hmb/3_size_test
function: scripts/conformance/03_features/hmb/3_size_test.py::test_hmb_single_buffer
Verify single buffer when host enable hmb.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb with single buffer
- run ioworker
function: scripts/conformance/03_features/hmb/3_size_test.py::test_hmb_buffer_size_large
Verify large buffer size when host enable hmb.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb with single buffer
- run ioworker
function: scripts/conformance/03_features/hmb/3_size_test.py::test_hmb_buffer_size_small
Verify small buffer chunk size when host enable hmb.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb with single buffer
- run ioworker
function: scripts/conformance/03_features/hmb/3_size_test.py::test_hmb_buffer_size_tiny
Verify tiny buffer chunk size when host enable hmb.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb with single buffer
- run ioworker
file: scripts/conformance/03_features/hmb/4_mr_test
function: scripts/conformance/03_features/hmb/4_mr_test.py::test_hmb_mr_reset
MR bit set to 1, hsize and address are same as last, host will return the same size and address after return D0 from D3.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb and test ioworker
- disable hmb before reset
- not send any event, or
- nvme reset, or
- subsystem reset, or
- enter and exit D3 hot
- enable hmb again with the same buffer
- run ioworker after enable hmb again
function: scripts/conformance/03_features/hmb/4_mr_test.py::test_hmb_mr_d3_without_disable
Run ioworker without error when host don’t enable hmb after return to D0 from D3.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb and test ioworker
- disable hmb before reset
- enter and exit D3hot
- disable hmb
- run ioworker
- enable hmb again
- run ioworker
function: scripts/conformance/03_features/hmb/4_mr_test.py::test_hmb_mr_with_wrong_buffer
MR bit set to 1, hsize and address set to 0, host will be abort with a status of Invalid Field in Command after return D0 from D3.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb
- run ioworker
- disable hmb before reset
- enter and exit D3hot
- enable hmb
- run ioworker
function: scripts/conformance/03_features/hmb/4_mr_test.py::test_hmb_mr_with_different_buffer
MR bit is set to 1, but hsize/address are different to earlier value
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb and test ioworker
- disable hmb before reset
- enter and exit D3hot
- enable hmb with different field value
- run ioworker
file: scripts/conformance/03_features/hmb/5_memory_test
function: scripts/conformance/03_features/hmb/5_memory_test.py::test_hmb_address_non_align
When Host Memory Descriptor List address is not 16 byte aligned, HMB can be enabled.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb with non-align buffer
- run ioworker
function: scripts/conformance/03_features/hmb/5_memory_test.py::test_hmb_memory
HMB buffer will not affect other memory.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- allocate host memory buf1 before host enable hmb, and memory is written to full 0xaa data
- enable hmb
- allocate host memory buf2 before host enable hmb, and memory is written to full 0xbb data
- run ioworker after enable hmb
- check whether the data in buffer has changed
function: scripts/conformance/03_features/hmb/5_memory_test.py::test_hmb_not_equal
config buffer size in each entries unequal.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb with not equal buffer
- run ioworker
function: scripts/conformance/03_features/hmb/5_memory_test.py::test_hmb_out_of_order
config buffer size in each entries out of order.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb with out of oder buffer
- run ioworker
function: scripts/conformance/03_features/hmb/5_memory_test.py::test_hmb_bit_flip_in_buffer_list
bit flip host memory buffer list, controller handle errors.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb
- run ioworker
- bit flip happen in hmb buffer list
- run ioworker
function: scripts/conformance/03_features/hmb/5_memory_test.py::test_hmb_bit_flip_data_consistency
Bit flip host memory entry, controller shall handle errors
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb
- run ioworker to load data into HMB
- bit flip happen in HMB buffer
- run ioworker and verify data
function: scripts/conformance/03_features/hmb/5_memory_test.py::test_hmb_change_all_buffer_dword
Bit flip happen in every dword.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb
- run ioworker
- bit flip happen in every dword
- run ioworker and verify
function: scripts/conformance/03_features/hmb/5_memory_test.py::test_hmb_change_all_buffer_bytes
Bit flip happen in every bytes.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb
- run ioworker
- bit flip happen in every bytes
- run ioworker and verify
function: scripts/conformance/03_features/hmb/5_memory_test.py::test_hmb_change_all_buffer_interval
Bit flip happen in every bytes.
Reference
- NVM Express Revision 1.4a March 9, 2020.
- 5.21.1.13 Host Memory Buffer (Feature Identifier 0Dh), (Optional)
Steps
- enable hmb
- run ioworker
- bit flip happen in each interval 16K,128K,1M
- run ioworker and verify
folder: scripts/conformance/03_features
file: scripts/conformance/03_features/boot_partition_test
function: scripts/conformance/03_features/boot_partition_test.py::test_boot_partition_write
write an image to boot partition
Reference
- NVM Express Revision 2.0
Steps
- find the boot image size
- prepare the buffer chunks of the image
- download the image in multiple pieces
- commit the download image
function: scripts/conformance/03_features/boot_partition_test.py::test_boot_partition_load
load the image in boot parition with nvme registers
Reference
- NVM Express Revision 2.0
Steps
- find the boot image size
- set registers to load and verify boot image
- print read speed
function: scripts/conformance/03_features/boot_partition_test.py::test_boot_partition_load_beyond_end
If the host attempts to read beyond the end of a Boot Partition, the controller shall not transfer data and report an error in the BPINFO.BRS field.
Reference
- NVM Express Revision 2.0
Steps
- find the boot image size
- set registers to load image beyond the end
- check if the BRS is error completed
- load correct image offset and check the BRS
function: scripts/conformance/03_features/boot_partition_test.py::test_boot_partition_verify
verify the image in boot parition with getlogpage command
Reference
- NVM Express Revision 2.0
Steps
- skip if NVMe spec version is below 2.0
- check boot partition log page is valid
- check boot image size in logpage
- find the boot image size
- get the image using getlogpage command and verify the data
- print read speed
function: scripts/conformance/03_features/boot_partition_test.py::test_boot_partition_load_power_cycle
power cycle while loading the image
Reference
- NVM Express Revision 2.0
Steps
- load a chunk
- load again
- dirty power cycle while loading boot image
- verify image after power cycle
function: scripts/conformance/03_features/boot_partition_test.py::test_boot_partition_load_change_address
set address register after loading image started
Reference
- NVM Express Revision 2.0
Steps
- load image
- change the buffer address
- check load result
function: scripts/conformance/03_features/boot_partition_test.py::test_boot_partition_load_write_dword
set address register in dword writing
Reference
- NVM Express Revision 2.0
Steps
- load image
- check load result
function: scripts/conformance/03_features/boot_partition_test.py::test_boot_partition_load_offset
load boot parition image into non-4K aligned address
Reference
- NVM Express Revision 2.0
Steps
- load a chunk into a buffer with offset
- check load result
function: scripts/conformance/03_features/boot_partition_test.py::test_boot_partition_power_cycle
power cycle during download boot parition image
Reference
- NVM Express Revision 2.0
Steps
- download the full image in bp0
- find the boot image size
- download the new image in multiple pieces
- commit the image
- dirty power cycle during commit boot partition image in progress
- load image with nvme registers
- verify data with old and new image
- Firmware Commit with Commit Action 110b or 111b shall guarantee atomic operation
file: scripts/conformance/03_features/power_management_test
function: scripts/conformance/03_features/power_management_test.py::test_power_state_transition
send read command during PS transition
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 208.
- 5.21.1.2 Power Management (Feature Identifier 02h): This Feature allows the host to configure the power state. The attributes are specified in Command Dword 11 (refer to Figure 274).
Steps
- disable autonomous power state transitions
- write data to LBA 0x5a
- read after power state change with delay 1us-1ms
function: scripts/conformance/03_features/power_management_test.py::test_power_state_ps3_simple
sending IO commands in the PS3 state
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 208.
- 8.4.1 Non-Operational Power States: The controller shall autonomously transition back to the most recent operational
- power state when an I/O Submission Queue Tail Doorbell is written.
Steps
- disable autonomous power state transitions
- start with PS0 and sleep 20s
- configure into PS3 and sleep 30s
- send identify and read command
function: scripts/conformance/03_features/power_management_test.py::test_power_state_async_with_io
transition to PS3 and PS4 with ioworker
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4.1 Non-Operational Power States: When in a non-operational power state, regardless of whether autonomous power state transitions are enabled, the controller shall autonomously transition back to the most recent operational power state when an I/O Submission Queue Tail Doorbell is written.
Steps
- disable autonomous power state transitions
- set NVMe device to operational power state
- fill 64GB data for verify
- set power state while reading the NVMe device, all commands shall complete successfully
function: scripts/conformance/03_features/power_management_test.py::test_power_state_operational_async_with_io
transition to different operational power state with ioworker
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- disable autonomous power state transitions
- set NVMe device to power state 0
- fill 64GB data for verify
- set power state while reading the NVMe device, all commands shall complete successfully
function: scripts/conformance/03_features/power_management_test.py::test_power_state_npss
set feature to each power state supported
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 317.
- 8.4 Power Management: A controller shall support at least one power state and may optionally support up to a total of power states.
Steps
- get the number of power states
- disable autonomous power state transitions
- set feature to each supported power state, and the commands shall complete successfully
- set feature to an invalid power state, and the command shall complete with error
function: scripts/conformance/03_features/power_management_test.py::test_power_state_maximum_power
compare the maximum power for each power state
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 317.
- 8.4 Power Management: Power states are contiguously numbered starting with zero such that each subsequent power state consumes less than or equal to the maximum power consumed in the previous state.
Steps
- get the number of power states
- get the maximum power for each power state
- compare the maximum power for each power state
function: scripts/conformance/03_features/power_management_test.py::test_power_state_operational_ps_with_ioworker
run ioworker during operational power state
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- enable autonomous power state transitions
- run ioworker in operational power state, all IO shall complete successfully
function: scripts/conformance/03_features/power_management_test.py::test_power_state_nonoperational_ps_with_io
send io commands in non-operational power state
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4.1 Non-Operational Power States: The controller shall autonomously transition back to the most recent operational power state when an I/O Submission Queue Tail Doorbell is written.
Steps
- disable autonomous power state transitions
- send io commands in each non-operational power state
- check controller put power state back to the most recent operational power state
function: scripts/conformance/03_features/power_management_test.py::test_power_state_nonoperational_ps_with_mixio
send mix io commands in non-operational power state
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4.1 Non-Operational Power States: The controller shall autonomously transition back to the most recent operational power state when an I/O Submission Queue Tail Doorbell is written.
Steps
- disable autonomous power state transitions
- send mix io commands in each non-operational power state
- check controller put power state back to the most recent operational power state
function: scripts/conformance/03_features/power_management_test.py::test_power_state_with_admin_cmd
send admin command in different power state
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4.1 Non-Operational Power States: In a non-operational power state, memory-mapped I/O (MMIO) accesses, configuration register accesses and Admin Queue commands are serviced.
Steps
- disable autonomous power state transitions
- send admin command in each power state, all command should complete successfully
- check no change in power status
function: scripts/conformance/03_features/power_management_test.py::test_power_state_temperature_aer
trigger asynchronous events in different power state
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4.1 Non-Operational Power States: In a non-operational power state, memory-mapped I/O (MMIO) accesses, configuration register accesses and Admin Queue commands are serviced.
Steps
- set feature enable all asynchronous events
- get smart log to show disk temperature
- trigger asynchronous events in different power state
function: scripts/conformance/03_features/power_management_test.py::test_power_state_nonoperational_ps_with_dst
send device self-test command in non-operational power state
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4.1 Non-Operational Power States: Processing a command submitted to the Admin Submission Queue and processing background operations, if any, initiated by that command
Steps
- check if the device meets the test conditions
- enable Non-Operational Power State Permissive Mode
- disable autonomous power state transitions
- send device self-test command in each non-operational power state, check real power state
function: scripts/conformance/03_features/power_management_test.py::test_power_state_short_dst_duration
send set feature commands while device self test
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- If a controller has an operation in process (e.g., device self-test operation) that would cause controller power to exceed that advertised for
- the proposed non-operational power state, then the controller should not autonomously transition to that state.
Steps
- check if the device meets the test conditions
- start a short DST, and record start time
- send set feature commands while device self test
- check if the completion time is less than 2 minutes
function: scripts/conformance/03_features/power_management_test.py::test_power_state_different_ps_with_write_register
modify the NVMe register in different power state
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4.1 Non-Operational Power States: In a non-operational power state, memory-mapped I/O (MMIO) accesses, configuration register accesses and Admin Queue commands are serviced.
Steps
- disable autonomous power state transitions
- modify the NVMe register in each power state and power state should not change
function: scripts/conformance/03_features/power_management_test.py::test_power_state_different_ps_with_write_pcie_register
modify the PCIe register in different power state
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4.1 Non-Operational Power States: In a non-operational power state, memory-mapped I/O (MMIO) accesses, configuration register accesses and Admin Queue commands are serviced.
Steps
- close autonomous power state transitions
- modify the PCIe register in each non-operational power state and power state should not change
function: scripts/conformance/03_features/power_management_test.py::test_power_state_autonomous_ps_transitions
idle and check power states
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4.2 Autonomous Power State Transitions: Autonomous power state transitions provide a mechanism for the host to configure the controller to automatically transition between power states on certain conditions without software intervention.
- If NOPPME is set to ‘1’, then the controller may temporarily exceed the power limits of any non-operational power state, up to the limits of the last operational power state
- If NOPPME is cleared to ‘0’, then the controller shall not exceed the limits of any non-operational state while running controller initiated background operations in that state (i.e., Non-Operational Power State Permissive Mode is disabled).
Steps
- try to disable NOPPME
- enable autonomous power state transitions
- idle 10s, power state shall change to non-operational power state
function: scripts/conformance/03_features/power_management_test.py::test_power_state_invalid_transition
controller should abort the command with a status of Invalid Field to a operational state
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 320.
- 8.4.2 Autonomous Power State Transitions: If an operational power state is specified,then the controller should abort the command with a status of Invalid Field in Command.
Steps
- if DUT doesn’t support nvme version 1.4, skip this test
- skip if NVMe spec version is below 1.4
- skip if APST is not supported
- enable autonomous power state transitions
function: scripts/conformance/03_features/power_management_test.py::test_power_state_max_power_pcie
verify PS0 max power less than PCI Express slot power limit control value
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4 Power Management: Hosts that do not dynamically manage power should set the power state to the lowest numbered state that satisfies the PCI Express slot power limit control value.
Steps
- get PCI Express slot power limit control value
- get PS0 max power
- Compare pcie slot power with PS0 max power
function: scripts/conformance/03_features/power_management_test.py::test_power_state_operational_performance
compare performance in each operational ps
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 318:
- 8.4 Power Management: Relative performance values provide an ordering of performance characteristics between power states. Relative performance values may repeat, may be skipped,
- and may be assigned in any order
Steps
- close autonomous power state transitions
- get performance in each operational ps
- compare the performance in each operational ps
function: scripts/conformance/03_features/power_management_test.py::test_power_state_thermal_throttle_performance
check performance with different thermal throttle configuration
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 321.
- 8.4.5 Host Controlled Thermal Management
- The temperature at which the controller stops being in a lower power active power state or performing vendor specific thermal management actions because of this feature is vendor specific.
Steps
- skip this test if the feature is not supported by the device
- fix on PS0, and disable autonomous power state transitions
- get current temperature from SMART data
- skip the test if current temperature is out of scope host can control
- get the performance in normal case, no thermal throttle
- idle to cool down, and get current temperature
- make current temperature higher than TMT1 for the light throttle
- light throttle performance should be lower than usual performance
- idle to cool down, and get current temperature
- make current temperature higher than TMT2 for the heavy throttle
- heavy throttle performance should be lower than light throttle performance
- idle to cool down, and get current temperature
- make current temperature higher than TMT1 and lower than TMT2, but the heavy throttle continues
- light throttle performance should be higher than heavy throttle performance
- restore the TMT setting
function: scripts/conformance/03_features/power_management_test.py::test_power_state_with_hot_reset
change power state before hot reset
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4 Power Management
Steps
- change power state before hot reset
- check power state is ps0 after hot reset
function: scripts/conformance/03_features/power_management_test.py::test_power_state_with_function_level_reset
change power state before function level reset
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4 Power Management
Steps
- change power state before function level reset
- check power state is ps0 after function level reset
function: scripts/conformance/03_features/power_management_test.py::test_power_state_idle_transition_ps
configure the settings for autonomous power state transitions
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 216:
- 5.21.1.12 Autonomous Power State Transition (Feature Identifier 0Ch): Each entry in the Autonomous Power State Transition data structure is defined in Figure 289.
Steps
- enable APST
- setup 3-sec transition time in APST table
- idle for 2 sec and check power state not change
- idle for 4 sec and check power state is changed
- setup 5-sec transition time in APST table
- idle for 4 sec and check power state not change
- idle for 6 sec and check power state is changed
function: scripts/conformance/03_features/power_management_test.py::test_power_state_disable_special_ps_apst
disable the autonomous power state transition feature for special power state
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 216.
- 5.21.1.12 Autonomous Power State Transition (Feature Identifier 0Ch), (Optional)
Steps
- enable autonomous power state transitions
- disable the autonomous power state transition feature for special power state
- the special power state shall not automatic transition
function: scripts/conformance/03_features/power_management_test.py::test_power_state_break_transition
IO command break autonomous power state transition
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4.2 Autonomous Power State Transitions
Steps
- enable autonomous power state transitions
- send io command before satisfying idle time
- idle time shall be recalculated
function: scripts/conformance/03_features/power_management_test.py::test_power_state_change_idle_time
change apst idle time before satisfying idle time
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 319.
- 8.4.2 Autonomous Power State Transitions
Steps
- enable autonomous power state transitions
- change apst idle time before satisfying idle time
- idle time should be changed
function: scripts/conformance/03_features/power_management_test.py::test_power_state_host_power
change nvme power state according to the power state of the host
Reference
- NVM Express Revision 1.4a March 9, 2020.
- https://docs.microsoft.com/en-gb/windows-hardware/design/component-guidelines/power-management-for-storage-hardware-devices-nvme
Steps
- get host power state
- get identify power state transition latency
- fill data for verify
- Random enter different host power state
function: scripts/conformance/03_features/power_management_test.py::test_power_state_latency
check the latency of ps transition between each other
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 318:
- 8.4 Power Management: The Entry Latency (ENTLAT) field in the power management descriptor indicates
- the maximum amount of time in microseconds to enter that power state and the Exit Latency (EXLAT) field indicates the maximum amount of time in microseconds to exit that state.
Steps
- close autonomous power state transitions
- check the latency of ps switching between each other
function: scripts/conformance/03_features/power_management_test.py::test_power_state_apst_saveable
verify Autonomous Power State Transition feature saveable
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 215:
- 5.21.1.12 Autonomous Power State Transition (Feature Identifier 0Ch), (Optional)
Steps
- skip the test if Autonomous Power State Transition is not supported
- skip the test if Autonomous Power State Transition is not saveable
- disable Autonomous Power State Transition with sv enabled
- issue nvme controller reset
- check Autonomous Power State Transition is disable
- recover to original configuration
function: scripts/conformance/03_features/power_management_test.py::test_power_state_idle_with_low_speed
low power in different pcie speed
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 215:
Steps
- skip test if apst is not supported
- enable autonomous power state transitions
- set pcie speed
- check acutal link speed
- check apst is enabled
- enable ASPM L1.2
- fix on PS0
- write LBA0
- send read IO with idle
- restore pcie speed
function: scripts/conformance/03_features/power_management_test.py::test_power_state_format
format in different power state
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- set PS and do format
- check the PS after format fnishes
file: scripts/conformance/03_features/reset_test
function: scripts/conformance/03_features/reset_test.py::test_reset_queue_level_reset
verify queue level reset with outstanding io command
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 293.
- 7.3.3 Queue Level
Steps
- format the namespace to make all data zero in the namespace
- create Submission/Completion Queue
- send 100 write commands
- issue queue level reset while io are outstanding
- send 100 read commands
- data read shall be the same as the data written, otherwise the data read shall be all zero
- delete SQ and CQ
function: scripts/conformance/03_features/reset_test.py::test_reset_controller_reset_nvme_registers
check nvme register values after controller reset
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 292.
- 7.3.2 Controller Level Reset
Steps
- get the initial value of CC register
- modify CC register value
- issue controller reset
- check if CC register is reset to original
- set cc.en = 0
- modify AQA register value
- set cc.en = 1 to reset NVMe registers
- check AQA register has been modified
- check AQA register has been reset to original value
function: scripts/conformance/03_features/reset_test.py::test_reset_controller_reset_d3hot
issue controller reset after exiting D3hot
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 292.
- 7.3.2 Controller Level Reset
Steps
- enable D3hot and sleep 3 seconds
- exit D3hot
- issue controller reset
- check controller status is normal
function: scripts/conformance/03_features/reset_test.py::test_reset_controller_reset_aspm
enter ASPM L1 and issue controller reset
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 292.
- 7.3.2 Controller Level Reset
Steps
- issue controller reset
- check controller status is normal
function: scripts/conformance/03_features/reset_test.py::test_reset_controller_reset_with_outstanding_io
verify controller reset with outstanding io command
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 292.
- 7.3.2 Controller Level Reset
Steps
- format the namespace to make all data zero in the namespace
- send 100 write commands in one shot
- issue controller reset while io is active
- send 100 read commands
- data read shall be the same as the data written, otherwise the data read shall be all zero
function: scripts/conformance/03_features/reset_test.py::test_reset_controller_reset_ioworker
verify controller reset with ioworker
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 292.
- 7.3.2 Controller Level Reset
Steps
- issue controller reset while ioworker is running
- check controller status is normal
function: scripts/conformance/03_features/reset_test.py::test_reset_controller_with_existed_adminq
reset controller with adminq registers unchanged
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- get the adminq registers
- reset contorller with the existed adminq and register
- send 10000 admin commands to check the function of the adminq
- check if the adminq registers is the same as that before reset
function: scripts/conformance/03_features/reset_test.py::test_reset_flr_d3hot
issue function level reset after exiting D3hot
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 292.
- 7.3.2 Controller Level Reset
Steps
- enable D3hot and sleep 3 seconds
- issue function level reset
- check controller status is normal
function: scripts/conformance/03_features/reset_test.py::test_reset_flr_aspm
enter ASPM L1 and issue function level reset
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 292.
- 7.3.2 Controller Level Reset
Steps
- enable ASPM L1 and sleep 3 seconds
- issue function level reset
- check controller status is normal
function: scripts/conformance/03_features/reset_test.py::test_reset_flr_with_ioworker
verify function level reset with ioworker
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- start ioworker and then call FLR reset
function: scripts/conformance/03_features/reset_test.py::test_reset_flr_with_outstanding_io
verify function level reset with io command
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 292
Steps
- create CQ and SQ
- send commands to the SQ in one shot
- FLR reset with active IO
- read after reset with outstanding writes
- data verify
function: scripts/conformance/03_features/reset_test.py::test_reset_pci_hot_reset_d3hot
issue hot reset after exiting D3hot
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 292.
- 7.3.2 Controller Level Reset
Steps
- enable D3hot and sleep 3 seconds
- issue hot reset
- check controller status is normal
function: scripts/conformance/03_features/reset_test.py::test_reset_pci_hot_reset_aspm
enter ASPM L1 and issue hot reset
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 292.
- 7.3.2 Controller Level Reset
Steps
- issue hot reset
- check controller status is normal
function: scripts/conformance/03_features/reset_test.py::test_reset_pci_hot_reset_with_ioworker
verify hot reset with ioworker
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 292.
- 7.3.2 Controller Level Reset
Steps
- issue hot reset while ioworker is running
- check controller status is normal
function: scripts/conformance/03_features/reset_test.py::test_reset_pci_hot_reset_with_outstanding_io
Verify hot reset with io command
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 292.
Steps
- create CQ and SQ
- send some commands to the SQ in one shot
- reset with active IO
- read after reset with outstanding writes
- data verify
function: scripts/conformance/03_features/reset_test.py::test_reset_subsystem_reset_d3hot
verify subsystem reset and D3hot
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- send PCIe power state to D3hot before Subsystem Reset
- check drive status after reset
function: scripts/conformance/03_features/reset_test.py::test_reset_subsystem_reset_aspm
verify subsystem reset and ASPM L1
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- check status after reset
function: scripts/conformance/03_features/reset_test.py::test_reset_subsystem_reset_with_ioworker
Verify subsystem reset with ioworker
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- issue subsystem reset while ioworker is running
- check drive status after reset
function: scripts/conformance/03_features/reset_test.py::test_reset_subsystem_reset_with_outstanding_io
Verify subsystem reset and io command
Reference
- NVM Express Revision 1.4a March 9, 2020, Page 292
- When an NVM Subsystem Reset occurs, the entire NVM subsystem is reset.
Steps
- create CQ and SQ
- send some commands at one shot
- reset with active IO
- read after reset with outstanding writes
- data verify
function: scripts/conformance/03_features/reset_test.py::test_reset_timing
get the time of nvme init process
Reference
- NVM Express Revision 1.4a
Steps
- defined nvme init process
- reset controller with user
- wait csts.rdy = 1
- send first identify command and get the latency
- init all namespace and queue
- send first read IO command and get latency
- free resources
file: scripts/conformance/03_features/write_protect_test
function: scripts/conformance/03_features/write_protect_test.py::test_write_protect
check write protect function
Reference
- NVM Express Revision 1.4c
- 5.21.1.29 Namespace Write Protection Config
Steps
- check if write protect is supported
folder: scripts/conformance/04_registers
file: scripts/conformance/04_registers/controller_test
function: scripts/conformance/04_registers/controller_test.py::test_controller_cap
read Controller Capabilities register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 43.
- 3.1.1 Offset 0h: CAP – Controller Capabilities
Steps
- read Controller Capabilities
- read Memory Page Size Maximum and Memory Page Size Minimum
- check mpsmax is greater than mpsmin
- read Controller Configuration Memory Page Size
- check cc.mps is smaller than mpsmin and larger than mpsmax
- check controller support NVM command set
function: scripts/conformance/04_registers/controller_test.py::test_controller_crto
Controller Ready Timeouts
Reference
- NVM Express Revision 2.0c
- 3.1.3.21 Offset 68h: CRTO
Steps
- skip if NVMe spec version is below 2.0
- check CRTO related registers
- Attempt to write to the read-only register and assert no change
- check CRWMT
- Check CRIMT
function: scripts/conformance/04_registers/controller_test.py::test_controller_version
read Version register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 45.
- 3.1.2 Offset 8h: VS – Version
Steps
- read Version register
- check the major version
function: scripts/conformance/04_registers/controller_test.py::test_controller_cc
read Controller Configuration register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 47.
- 3.1.5 Offset 14h: CC – Controller Configuration
Steps
- read Controller Configuration
- check I/O Completion Queue Entry Size is 16 bytes, I/O Submission Queue Entry Size is 64 bytes
function: scripts/conformance/04_registers/controller_test.py::test_controller_register_reserved
read Reserved field in Controller register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 47.
- 3.1.5 Offset 14h: CC – Controller Configuration
Steps
- check Reserved field in Controller register is “0”
- write “1234” to the reserved field
- check Reserved field in Controller register is “0”
function: scripts/conformance/04_registers/controller_test.py::test_controller_csts
read Controller Status register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 49.
- 3.1.6 Offset 1Ch: CSTS – Controller Status
Steps
- read Controller Status
- check csts.rdy is 1
function: scripts/conformance/04_registers/controller_test.py::test_controller_cap_to
verify cap.timout is the worst case time during CSTS.RDY transition
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 49.
Steps
- read Controller Capabilities Timeout value
- change cc.en from ‘1’ to ‘0’
- wait csts.rdy change from ‘1’ to ‘0’, and check the duration time
- change cc.en from ‘0’ to ‘1’
- wait csts.rdy change from ‘0’ to ‘1’, and check the duration time
function: scripts/conformance/04_registers/controller_test.py::test_controller_cap_mqes
verify create IO CQ/SQ will fail when qid is greater than mqes
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 45.
- Offset 0h: CAP – Controller Capabilities
Steps
- read Maximum Queue Entries Supported
- check controller supports at least 2 entries
- check create IO CQ will fail when qsize is greater than mqes.
- check create IO SQ will fail when qsize is greater than mqes.
function: scripts/conformance/04_registers/controller_test.py::test_controller_ams
read Arbitration Mechanism Supported and Selected
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 44.
- Offset 0h: CAP – Controller Capabilities
Steps
- Read Arbitration Mechanism Supported
- Read Arbitration Mechanism Selected
function: scripts/conformance/04_registers/controller_test.py::test_controller_intms_and_intmc
read Interrupt Mask Set and Interrupt Mask Clear
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 46.
- 3.1.3 Offset Ch: INTMS – Interrupt Mask Set
- 3.1.4 Offset 10h: INTMC – Interrupt Mask Clear
Steps
- read Interrupt Mask Set and Interrupt Mask Clear
- write Interrupt Mask Set “0”
- write Interrupt Mask Clear “0”
- check intms and intmc do not change value
function: scripts/conformance/04_registers/controller_test.py::test_controller_cc_iocqes
verify I/O Completion Queue Entry Size is valid
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 47.
- 3.1.5 Offset 14h: CC – Controller Configuration
Steps
- read I/O Completion Queue Entry Size
- read identify Completion Queue Entry Size
- check identify Completion Queue Entry Size is valid
- check I/O Completion Queue Entry Size is valid
function: scripts/conformance/04_registers/controller_test.py::test_controller_cc_iosqes
verify I/O Submission Queue Entry Size is valid
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 47.
- 3.1.5 Offset 14h: CC – Controller Configuration
Steps
- read I/O Submission Queue Entry Size
- read identify Submission Queue Entry Size
- check identify Submission Queue Entry Size is valid
- check I/O Submission Queue Entry Size is valid
function: scripts/conformance/04_registers/controller_test.py::test_controller_cc_en
change Controller Configuration Enable
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 49.
- 3.1.5 Offset 14h: CC – Controller Configuration
Steps
- enable cc.en
- check csts.rdy is “1”
- issue a read command
- check read successfully
- change cc.en from ‘1’ to ‘0’
- wait csts.rdy change from ‘1’ to ‘0’
- check fail to init admin queue
- change cc.en from ‘0’ to ‘1’
- wait csts.rdy change from ‘0’ to ‘1’
function: scripts/conformance/04_registers/controller_test.py::test_controller_cc_css
read Controller Configuration I/O Command Set Selected
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 48.
- 3.1.5 Offset 14h: CC – Controller Configuration
Steps
- read Controller Configuration I/O Command Set Selected
function: scripts/conformance/04_registers/controller_test.py::test_controller_mdts
issue io command with invalid number of logical blocks
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 173.
- 5.15.2.2 Identify Controller data structure (CNS 01h)
Steps
- get Memory Page Size Minimum
- get Maximum Data Transfer Size
- create Submission/Completion Queue
- prepare long data for the write command
- issue a write command with long data
- the command shall complete successfully
- issue a write command with invalid number of logical blocks
- the command shall complete with error
- issue a read command with invalid number of logical blocks
- the command shall complete with error
- issue a read command with valid number of logical blocks
- the command shall complete successfully
- delete Submission/Completion Queue
function: scripts/conformance/04_registers/controller_test.py::test_controller_doorbell_invalid
AER will be triggered when write an invalid doorbell value.
Reference
- NVM Express Revision 1.4a March 9, 2020. Figure 146
Steps
- issue one AER command
- get number of queue
- access invalid register outside of doorbells
function: scripts/conformance/04_registers/controller_test.py::test_controller_cc_shn
send Shutdown Notification
Reference
- NVM Express Revision 1.4a. June 10, 2020. Page 50:
- This field indicates the status of shutdown processing that is initiated by the host setting the CC.SHN field.
Steps
- write cc.shn=01b and check the value of csts.shst
- send shutdown notify to DUT
function: scripts/conformance/04_registers/controller_test.py::test_controller_shn_before_commands
send controller shutdown notification before other commands
Reference
- NVM Express Revision 1.4a. June 10, 2020.
Steps
- send read IO commands and admin commands
- send shutdown notify and get the response time
- controller reset without power cycle
- send read IO commands and admin commands
function: scripts/conformance/04_registers/controller_test.py::test_controller_cc_memory_page_size_8k
set MPS to 8K and test 4K read/write
Reference
- NVM Express Revision 1.4a. June 10, 2020.
Steps
- check if MPS supports 8K page size
- prepare 4K read/write buffer
- send write and read command
- wait commands complete and verify data
function: scripts/conformance/04_registers/controller_test.py::test_controller_asq
set ASQ register with different locations
Reference
- NVM Express Revision 1.4a. June 10, 2020.
Steps
- reset controller with different locations of admin SQ
- test with many admin commands to fill-up admin SQ
file: scripts/conformance/04_registers/pcie_test
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_identifiers
read Identifiers register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 22.
- 2.1.1 Offset 00h: ID – Identifiers
Steps
- read Identifiers
- read Class Code
- read Subsystem Identifiers
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_command
read and check Command register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 22.
- 2.1.2 Offset 04h: CMD – Command
Steps
- read Command register
- check Memory Space Enable bit is “1”. Controls access to the controller’s register memory space.
- check reserved field is “0”
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_revision_id
read Revision ID register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 23.
- 2.1.4 Offset 08h: RID – Revision ID
Steps
- read Revision ID
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_class_code
read Class Code register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 23.
- 2.1.5 Offset 09h: CC – Class Code
Steps
- read Class Code
- check the device is a Non-Volatile memory controller
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_bist
read Built-In Self Test register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 24.
- 2.1.9 Offset 0Fh: BIST – Built-In Self Test (Optional)
Steps
- read Built-In Self Test
- Completion Code (CC) should be zero
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_pmcr
read PCI Power Management Capabilities register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 27.
- 2.2.2 Offset PMCAP + 2h: PC – PCI Power Management Capabilities
Steps
- get PCI Power Management Capabilities starting address
- read PCI Power Management Capabilities
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_pmcsr
read PCI Power Management Control and Status register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 27.
- 2.2.3 Offset PMCAP + 4h: PMCS – PCI Power Management Control and Status
Steps
- get PCI Power Management Control and Status starting address
- read PCI Power Management Control and Status
- read power consumed or dissipation
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_pcie_cap
read PCI Express Device Capabilities register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 31.
- 2.5 PCI Express Capability
Steps
- get PCI Express Capability starting address
- read PCI Express Capabilities Register
- read Device Capabilities Register
- read Device Control Register
- read PCI Express Device Status register
- cleared correectable error detected bit
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_link_capabilities_and_status
read PCI Express Link Capabilities register
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 34.
- 2.5.6 Offset PXCAP + Ch: PXLCAP – PCI Express Link Capabilities
Steps
- read PCI Express Link Capabilities
- read PCI Express Link Control register
- read PCI Express Link Status register
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_format
send a format command
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 234.
- 5.23 Format NVM command – NVM Command Set Specific
Steps
- send a format command and complete successfully
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_write_bandwidth
read bandwidth
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 31.
Steps
- set io size
- get bandwidth
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_link_control_aspm
enable aspm and send read command
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 35.
- Active State Power Management Control (ASPMC): This field controls the level of
- ASPM executed on the PCI Express Link
Steps
- read PCI Express Link Control register
- set different ASPM status
- create IO queue for read commands
- read lba 0 for 100 times
- return ASPM L0
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_mps_256
check MPS register
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- read MPS register from PCIe capability
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_read_write
write read with modified payload
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_max_read_request_size
change max payload size setting and run IO test
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- check device control register
- set MRR
- double check device control register
- run test to get the bandwidth
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_read_write_post
write read with modified payload
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_reset
reset pcie to restore payload setting
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
function: scripts/conformance/04_registers/pcie_test.py::test_pcie_read_write_after_reset
write read with modified payload
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
file: scripts/conformance/04_registers/power_test
function: scripts/conformance/04_registers/power_test.py::test_power_pcie_pmcsr_d3hot
verify DUT can enter D3hot and exit D3hot normally, DUT can handle Admin command after entering D0 from D3hot.
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 27.
- 2.2.2 Offset PMCAP + 2h: PC – PCI Power Management Capabilities
Steps
- get PCI Power Management Capabilities
- set D3hot
- set D0
- set D3hot
- check admin command shall timeout
- set back to D0
function: scripts/conformance/04_registers/power_test.py::test_power_pcie_capability_d3hot
verify DUT can enter D3hot and exit D3hot normally, DUT can handle ioworker after entering D0 from D3hot.
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 27.
- 2.2.2 Offset PMCAP + 2h: PC – PCI Power Management Capabilities
Steps
- get power state
- check power state is D0
- set D3hot, sleep 1 second
- exit D3hot, enter D0
- run ioworker in D0
- set D0
- run ioworker in D0
- check power state is D0
function: scripts/conformance/04_registers/power_test.py::test_power_pcie_aspm_L1
Verify DUT enter L1 and exit L1 normally, DUT can handle Admin command after entering to L0 from L1.
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 35.
- Active State Power Management Control (ASPMC): This field controls the level of ASPM executed on the PCI Express Link
Steps
- set ASPM L1
- issue admin command in ASPM L1, it shall complete successfully, sleep 1 second
- set ASPM L0
function: scripts/conformance/04_registers/power_test.py::test_power_pcie_aspm_l1_and_d3hot
verify when host set ASPM and D3hot at the same time
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 21.
- 2 System Bus (PCI Express) Registers
Steps
- enter ASPM L1
- set D3hot, sleep 1 second
- exit D3hot, set D0
- check ASPM is L0
- set D3hot
- set ASPM L1, sleep 1 second
- set ASPM L0
- set D0
- run ioworker in D0 ASPM L0
- check ASPM is L0
- set D3hot, sleep 1 second
- set D0
- run ioworker in D0, it shall complete successfully
function: scripts/conformance/04_registers/power_test.py::test_power_pcie_ioworker_aspm
Host set ASPM when ioworking is on-going, and verify data consistency.
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 35.
- Active State Power Management Control (ASPMC): This field controls the level of ASPM executed on the PCI Express Link.
Steps
- start a read/write mixed ioworker
- toggle APSM setting periodically
- reset controller
folder: scripts/conformance/05_controller
file: scripts/conformance/05_controller/arbitration_test
function: scripts/conformance/05_controller/arbitration_test.py::test_arbitration_weighted_round_robin
verify handling mechanism of Weighted Round Robin with Urgent Priority Class Arbitration
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 92.
- In this arbitration mechanism, there are three strict priority classes and three weighted round robin priority levels. If Submission Queue A is of higher strict priority than Submission Queue B, then all candidate commands in Submission Queue A shall start processing before candidate commands from Submission Queue B start processing.
Steps
- check if controller supports Weighted Round Robin
- format the DUT
- set feature Arbitration, HPW,MPW,LPW=8:4:2, Arbitration Burst:2,011b indicates eight
- check the latency of a admin command
- create 1 admin queue, 2 urgent, 2 high, 2 medium and 2 low priority IO SQ queues
- create 8 SQ queues
- fill 50 flush commands in each queue
- fire all sq, low priority first
- check the latency of admin command
- check sqid of the whole cq
- assert all urgent IO completed first
- delete all queues
function: scripts/conformance/05_controller/arbitration_test.py::test_arbitration_weighted_round_robin_ioworker
verify set feature Arbitration and controller controls command proportion using Weighted Round Robin
Reference
- NVM Express Revision 1.4a. Page 207.
Steps
- precondition
- set feature Arbitration HPW,MPW,LPW=8:4:2, Arbitration Burst:2,011b indicates eight
- start ioworker
- high priority queue should consume more IO
function: scripts/conformance/05_controller/arbitration_test.py::test_arbitration_default_round_robin
verify handling mechanism of Round Robin Arbitration
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 91.
- If the round robin arbitration mechanism is selected, the controller shall implement round robin command arbitration amongst all Submission Queues, including the Admin Submission Queue. In this case, all Submission Queues are treated with equal priority. The controller may select multiple candidate commands for processing from each Submission Queue per round based on the Arbitration Burst setting.
Steps
- make sure cq depth is large enough for testing
- set feature Arbitration Burst: 2
- create 1 completion queue, 8 io submission queues
- fill 50 flush commands in each queue
- fire all sq, low prio first
- check the latency of a admin command
- check sqid of the whole cq
- assert all sqs have the same priority
- delete all queues
file: scripts/conformance/05_controller/interrupt_test
function: scripts/conformance/05_controller/interrupt_test.py::test_interrupt_aggregation_time_threshold
get the aggregation time setting
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- get the default interrupt aggregation time and threshold
function: scripts/conformance/05_controller/interrupt_test.py::test_interrupt_qpair_msix_mask
verify MSIx mask bits
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 297.
- 7.5.2 MSIX Based Behavior: If either of the mask bits are set to ‘1’, the corresponding pending bit in the MSIX PBA structure is set to ‘1’ to indicate that an interrupt is pending for that vector. The MSI for that vector is later generated when both the mask bits are reset to ‘0’.
Steps
- create a pair of CQ/SQ and clear MSIx interrupt
- send a read command
- check the MSIx interrupt is set up
- clear MSIx interrupt
- send a read command
- check the MSIx interrupt is set up
- clear MSIx interrupt and mask it
- send a read command
- check the MSIx interrupt is not set up
- unmask the MSIx interrupt
- check the MSIx interrupt is set up
function: scripts/conformance/05_controller/interrupt_test.py::test_interrupt_multiple_qpair_msix
check MSIx interrupts on two CQ
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 297.
- 7.5.2 MSIX Based Behavior: MSIX allows completions to be aggregated on a per vector basis. Each Completion Queue(s) may send its own interrupt message, as opposed to a single message for all completions.
Steps
- create two pairs of CQ/SQ with interrupt enabled
- send the read command into the first SQ
- MSIx interrupt is triggered in the first CQ
- MSIx interrupt is not triggered in the second CQ
- delete CQ
function: scripts/conformance/05_controller/interrupt_test.py::test_interrupt_qpair_msix_coalescing
verify MSIx interrupt coalescing and the Aggregation Time
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 213.
- The controller should signal an interrupt when either the Aggregation Time or the Aggregation Threshold conditions are met.
Steps
- clear MSIx interrupt
- enable Interrupt Vector 1 Coalescing
- send one command, get original interrupt latency
- set aggregation time: 200*100us=0.02s, aggregation threshold: 6
- send two commands
- get interrupt latency
- the interrupt should be delayed for aggregation
- disable Interrupt Coalescing
- send one command
- get interrupt latency
- check the current interrupt latency not delayed
function: scripts/conformance/05_controller/interrupt_test.py::test_interrupt_coalescing
verify disable interrupt coalescing
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 214.
- If set to 1, then any interrupt coalescing settings shall not be applied for this interrupt vector. If cleared to 0, then interrupt coalescing settings apply for this interrupt vector.
Steps
- enable Interrupt Vector 1 Coalescing
- clear MSIx interrupt
- send one command, get original interrupt latency
- send some read as precondition
- disbale Interrupt Vector 1 Coalescing
- set aggregation time: 200*100us=0.02s, aggregation threshold: 10
- send two commands
- get interrupt latency
- check the current interrupt latency is not aggregated
- enable Interrupt Vector 1 Coalescing
- send two commands
- get interrupt latency
- check the interrupt is aggregated
function: scripts/conformance/05_controller/interrupt_test.py::test_interrupt_different_coalescing
one qpair enable interrupt coalescing, the other one is disabled
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 214.
- If set to ‘1’, then any interrupt coalescing settings shall not be applied for this interrupt vector. If cleared to ‘0’, then interrupt coalescing settings apply for this interrupt vector.
Steps
- create two pairs of CQ/SQ
- enable Interrupt Vector 1 and 2 Coalescing
- get the normal interrupt latency on qpair1
- disbale Interrupt Vector Coalescing on qpair2
- set aggregation time: 200*100us=0.02s, aggregation threshold: 10
- send two commands on qpair1
- get the interrupt lantecy on qpair1
- interrupt latency should be aggregated
- send two read commands on qpair2
- get the interrupt lantecy on qpair2
- the interrupt on qpair is not delayed for aggregation
function: scripts/conformance/05_controller/interrupt_test.py::test_interrupt_vector_discontiguous
verify discontiguous interrupting vectors
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 102.
- Interrupt Vector (IV): This field indicates interrupt vector to use for this Completion Queue.
Steps
- create qpair1 with vector 2, qpair2 with vector 4
- clear the MSIx interrupt on qpair1
- send a read command on qpair1
- check the MSIx interrupt on qpair1 is set up
- clear MSIx interrupt on qpair2
- send a read command on qpair2
- check the MSIx interrupt on qpair2 is set up
function: scripts/conformance/05_controller/interrupt_test.py::test_interrupt_specific_interrupt_vector_coalescing
enable interrupt vector coalescing on one qpair, but disable on another
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 102.
- 5.21.1.8 Interrupt Coalescing (Feature Identifier 08h)
- 5.21.1.9 Interrupt Vector Configuration (Feature Identifier 09h)
Steps
- create two pairs of CQ/SQ with different interrupt vector, both coalescing disabled
- aggregation on qpair2 is enabled
- set aggregation time: 200*100us=0.02s, aggregation threshold: 10
- check the interrupt of qpair2 is aggregated
- aggregation of qpair1 is disabled
- check if the interrupt on qpair1 is not aggregated
function: scripts/conformance/05_controller/interrupt_test.py::test_interrupt_create_cq_disable
create cq with interrupt disabled
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 102.
- Interrupts Enabled (IEN): If set to ‘1’, then interrupts are enabled for this Completion Queue. If cleared to ‘0’, then interrupts are disabled for this Completion Queue.
Steps
- create qpair1 with interrupt enabled, qpair2 with enterrupt disabled
- clear the MSIx interrupt on qpair1
- send a write command on qpair1
- check the MSIx interrupt on the first qpair is set up
- clear the MSIx interrupt on qpair2
- send a read command on qpair2
- check the MSIx interrupt of qpair2 is not set
- check the read command have completed
- delete qpairs
function: scripts/conformance/05_controller/interrupt_test.py::test_interrupt_qpair_msix_coalescing_numb
verify MSIx interrupt coalescing and the Aggregation Threshold
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 213:
- The controller should signal an interrupt when either the Aggregation Time or the Aggregation Threshold conditions are met.
Steps
- clear MSIx interrupt
- disable Interrupt Coalescing
- send three commands, get interrupt latency
- send 10 commands and check interrupt latency
- check the interrupt is aggregated
- set aggregation time: 200*100us=0.02s, aggregation threshold: 10
- send only 9 commands and check interrupt latency
- interrupt latency should be aggregated
- send 10 commands and check interrupt aggregation
- check the interrupt is aggregated
function: scripts/conformance/05_controller/interrupt_test.py::test_interrupt_ioworker_qpair
check interrupt when ioworker running
Reference
- NVM Express Revision 1.4a
Steps
- create a qpair with interrupt enabled or disabled
- start an ioworker with the qpair
- repeatly check if the interrupt presented if it is enabled
- delete the qpair
file: scripts/conformance/05_controller/prp_test
function: scripts/conformance/05_controller/prp_test.py::test_prp_format
format the device before following test cases
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- send a format command
function: scripts/conformance/05_controller/prp_test.py::test_prp_write_mdts
verify write with different data length
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 69.
- 4.3 Physical Region Page Entry and List:A physical region page list (PRP List) is a set of PRP entries in a single page of contiguous memory. A PRP List describes additional PRP entries that could not be described within the command itself
Steps
- get Memory Page Size Minimum
- get Maximum Data Transfer Size
- create a pair of io CQ/SQ
- create prp and prp list
- send a write command with different nlba
- check cq entry
function: scripts/conformance/05_controller/prp_test.py::test_prp_page_offset
verify read the data with different offset and check lba
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 69.
- 4.3 Physical Region Page Entry and List: Page Base Address and Offset (PBAO):
Steps
- fill the data
- read the data with different offset
- read successfully, check the lba
function: scripts/conformance/05_controller/prp_test.py::test_prp_admin_page_offset
send identify command with different valid offset
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 161.
- 5.15.1 Identify command overview: If using PRPs, this field shall not be a pointer to a PRP List as the data buffer may not cross more than one page boundary.
Steps
- create buffer for identify command
- send identify command with valid offset
- check identify data
function: scripts/conformance/05_controller/prp_test.py::test_prp_admin_page_offset_invalid
send identify command with different invalid offset
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 69.
- 4.3 Physical Region Page Entry and List: Page Base Address and Offset (PBAO): The Offset shall be dword aligned, indicated by bits 1:0 being cleared to 00b
Steps
- create buffer for identify command
- send identify command with invalid offset
- check identify data from offset 0 when no error reported
function: scripts/conformance/05_controller/prp_test.py::test_prp_valid_offset_in_prplist
verify PRP1 and PRP2 with valid offset
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- prp1 offset is not zero.
- prp2 (list) offset is not zero.
- fill 8 PRP entries into the PRP list
- issue read cmd with PRPs
- reap the command
- wait CQ pbit flip
function: scripts/conformance/05_controller/prp_test.py::test_prp_invalid_offset_in_prplist
set PRP entries in PRP List with invalid offset.
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- prp1 offset is not zero.
- prp2 (list) offset is not zero.
- entry offset in prp list is not zero, which is invalid
- issue a command with invalid prp list
- reap the command, error 00/13 shall occur: PRP Offset Invalid
function: scripts/conformance/05_controller/prp_test.py::test_prp_invalid_buffer_offset
fill an invalid PRP in an IO command whose offset is not zero
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 260
- 4.3. Physical Region Page Entry and List: The controller is not required to check that bits 1:0 are cleared to 00b. The controller may report an error of PRP Offset Invalid if bits 1:0 are not cleared to 00b. If the controller does not report an error of PRP Offset Invalid, then the controller shall operate as if bits 1:0 are cleared to 00b.
Steps
- write one LBA with an invalid PRP whose offset is not zero
- issue the write command and get the status code in CQE
- no error happen, then the controller shall operate as if PRP offset is zero
- read the LBA back, and check if the offset is correctly ignored
function: scripts/conformance/05_controller/prp_test.py::test_prp_invalid_one_qpair
create one qpair, and issue one invalid prp command
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- create one qpair
- issue a invalid prp command to sq
- delete qpair
function: scripts/conformance/05_controller/prp_test.py::test_prp_invalid_one_qpair_normal_command
create one qpair, and issue one invalid prp command and normal write and read command
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- create one qpair
- issue a invalid prp command to sq
- issue a normal write and read command to sq
- delete qpair
function: scripts/conformance/05_controller/prp_test.py::test_prp_invalid_multi_qpair_normal_command
create one qpair, and issue two invalid prp command and normal write and read command
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- create two qpair
- issue a invalid prp command to sq
- issue a normal write and read command to sq
- delete qpair
function: scripts/conformance/05_controller/prp_test.py::test_prp_multi_invalid_and_multi_normal_command
create one qpair, and issue multiple invalid prp commands and multiple normal commands
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- create one qpair
- issue multiple invalid prp commands
- issue multiple normal write commands
- delete qpair
function: scripts/conformance/05_controller/prp_test.py::test_prp_invalid_before_ioworker
create one qpair, and issue one invalid prp command
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- create one qpair
- issue a invalid prp command to sq
- run ioworker after inject invalid prp command
- delete qpair
function: scripts/conformance/05_controller/prp_test.py::test_prp_invalid_multiple
send commands with invalid PRP
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
function: scripts/conformance/05_controller/prp_test.py::test_prp_invalid_with_ioworker
send commands with invalid PRP while an ioworker is active
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- keep injecting invalid PRP into SQ
- define a create qpair and issue one prp invalid command function
function: scripts/conformance/05_controller/prp_test.py::test_prp_invalid_offset_create_sq
verify create IO SQ with invalid PRP offset
Reference
- NVM Express Revision 1.4a March 9, 2020.
- If there is a PRP Entry with a non-zero offset, then the controller should return an error of PRP Offset Invalid.
Steps
- create a valid CQ
- create the valid SQ
- create SQ with invalid PRP offset, and should be aborted with error status
function: scripts/conformance/05_controller/prp_test.py::test_prp_page_offset_invalid
read data with invalid buffer offset
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- fill the data
- read the data to different offset in the buffer
- check if read complete with correct data or expected error code
function: scripts/conformance/05_controller/prp_test.py::test_prp_identify_prp2
define PRP2 not consecutive with PRP1 in admin command
Reference
- NVM Express Revision 1.4a March 9, 2020.
Steps
- send an identify command with a contiguous buffer
- send an identify command with two separated buffer
- check data of two identify commands
file: scripts/conformance/05_controller/sq_cq_test
function: scripts/conformance/05_controller/sq_cq_test.py::test_sq_cq_around
create cq support 3 entries and issue 4 commands
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 63.
-
- Data Structures
Steps
- create a cq support 3 entries and a sq support 5 entries
- send 3 commands with CID 4,3,2,1
- check the first cq CID is 4
- check the second cq CID is 3
- check there is not the third cq command
- set cq head = 1
- check the first cq CID is 4
- check the third cq CID is 2
- send 4th command
- set cq head = 2, check p-bit is inverted
- check the third cq CID is 2
- check the second cq CID is 3
- check the first cq CID is 1
function: scripts/conformance/05_controller/sq_cq_test.py::test_sq_overflow
create sq support 2 entries and issue 2 commands
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 63.
-
- Data Structures
Steps
- create a cq support 5 entries and a sq support 2 entries
- send command with CID 4
- send command with CID 3
- check the first cq CID is 4
- check the second cq CID is 3
- check there are not he third,fourth,fifth cq commands
function: scripts/conformance/05_controller/sq_cq_test.py::test_sq_delete_after_cq
delete IO SQ prior to delete IO CQ
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 105.
- Host software shall ensure that any associated I/O Submission Queue is deleted prior to deleting a Completion Queue. If there are any associated I/O Submission Queues present, then the Delete I/O Completion Queue command shall fail with a status value of Invalid Queue Deletion.
Steps
- create a pair of io CQ/SQ
- check delete cq first is invalid
function: scripts/conformance/05_controller/sq_cq_test.py::test_sq_doorbell
write Submission Queue tail doorbell
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 63.
-
- Data Structures
Steps
- create a pair of io CQ/SQ
- set sq tail = 1 and complete successfully
function: scripts/conformance/05_controller/sq_cq_test.py::test_sq_doorbell_invalid
write an invalid sq doorbell
Reference
- NVM Express Revision 1.4a March 9, 2020. Figure 146.
- Asynchronous Event Information – Error Status. 01h//Invalid Doorbell Write Value: Host software attempted to write an invalid doorbell value.
Steps
- clear the associated asynchronous events
- create a pair of io CQ/SQ
- check invalid sq doorbell value will trigger asynchronous event
function: scripts/conformance/05_controller/sq_cq_test.py::test_sq_cq_another_sq
create two SQ linked to the same CQ
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 65.
- 4.2 Submission Queue Entry – Command Format
Steps
- create a cq and a sq both support 3 entries
- send command with CID 4
- send command with CID 3
- set sq tail = 2
- create the second io sq
- send command with CID 2 by the second sq
- check the first cq CID is 4
- check the second CID is 3
- check there is not the third cq command
- set cq head = 1
- check the third CID is 2
- check the first CID is 4
- send command with CID 1 by the second sq
- set cq head = 2
- check the first CID is 1
function: scripts/conformance/05_controller/sq_cq_test.py::test_sq_create_invalid_cqid
Create IO SQ command with an invalid CQID, shall fail with correct error codes.
Reference
- NVM Express Revision 1.4a. Page 104.
- a) cqid is 0h (i.e., the Admin Completion Queue), then the controller should return an error of Invalid Queue Identifier;
- b) cqid is outside the range supported by the controller, then the controller should return an error of Invalid Queue Identifier; or
- c) cqid is within the range supported by the controller and does not identify an I/O Completion Queue that has been created, then the controller should return an error of Completion Queue Invalid.
Steps
- get the number of queue supported by the device (ncqa)
- create a CQ with CQID 1
- create a SQ binding to the above CQ
- create a SQ binding to CQID 0, which should fail
- create a SQ binding to CQID 0xffff, which should fail
- create a SQ binding to ncqa+1 , which should fail
- create a SQ binding to ncqa+0xff , which should fail
- create a SQ binding to 2 or 4 (not exist cqid) , which should fail
- delete created SQ and CQ
function: scripts/conformance/05_controller/sq_cq_test.py::test_sq_read_write_burst
Create multiple SQE and update SQ doorbell in one time, check the cq overflow
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 101.
- 5.3 Create I/O Completion Queue command
Steps
- create cq and sq
- write 10 LBAs, and use LBA as the data pattern
- wait all write complete
- write one more
- cq overflow check
- delete sq and cq
- create cq and sq again
- read 10 LBAs
- wait all read complete
- check read data pattern
- delete sq and cq
function: scripts/conformance/05_controller/sq_cq_test.py::test_cq_doorbell_valid
create cq and do not create sq
Reference
- NVM Express Revision 1.4a March 9, 2020. Page 101.
- 5.3 Create I/O Completion Queue command
Steps
- create cq
- delete cq and complete successfully
function: scripts/conformance/05_controller/sq_cq_test.py::test_cq_create_physically_contiguous
If CAP.CQR is 1, create IO CQ in which CDW11.PC is 0 or a PRP Entry with a non-zero offset, shall fail with correct error code
Reference
- Page 101. Figure 150: If CDW11.PC is set to ‘1’, then this field specifies a 64-bit base memory address pointer of the Completion Queue that is physically contiguous. The address pointer is memory page aligned (based on the value in CC.MPS) unless otherwise specified.
Steps
- check CAP.CQR and skip test if if PC is not required
- create CQ with PC flag
- create CQ without PC flag, and error is expected
function: scripts/conformance/05_controller/sq_cq_test.py::test_cq_sq_diff_id
pair sq to cq with a different qid
Reference
- NVM Express Revision 2.0
Steps
- create cq with qid 1
- create sq with a different qid
- send a cmd
- check the cqe
- delete sq and cq
file: scripts/conformance/05_controller/sqe_cqe_test
function: scripts/conformance/05_controller/sqe_cqe_test.py::test_sqe_cqe_sqhd
verify SQ Head Pointer when the host the Submission Queue entries that have been consumed and may be re-used for new entries
Reference
- NVM Express Revision 1.4a, March 9, 2020.
Steps
- create a iocq with depth of 3, and a iosq with depth of 2
- issue one IO command and write sq.tail
- check SQHD, SQID and P-bit of the first cq entry updated, other cq entry have not updated
- issue one IO command again, and write sq.tail
- check SQHD, SQID and P-bit of the second cq entry updated, the last cq entry have not updated
- issue one IO command again, and write sq.tail
- the last cq entry have not updated if cq.head have not updated
- free one cqe before get the third cqe
- issue a command, and free a cqe
- check SQHD updated of the first cq entry updated, P-bit changed to 0
- delete SQ and CQ
function: scripts/conformance/05_controller/sqe_cqe_test.py::test_sqe_cqe_p_tag_invert_after_cq_full
verify the Phase Tag will invert each pass when the controller has wrapped around to the top of the Completion Queue
Reference
- NVM Express Revision 1.4a, March 9, 2020.
Steps
- create a iocq with depth of 2, create a iosq with depth of 10
- issue a write command into sq, and write sq.tail
- issue another write command into sq, and and write sq.tail
- check cid, sqid and sqhd for the first command updated
- check cid, sqid and sqhd for the second command updated
- check the p-bit of all cq entries is 1
- issue a write command into sq
- issue a write command into sq again
- check cid, sqid and sqhd for the third command updated
- check cid, sqid and sqhd for the last command updated after free a cqe
- check the p bit of all cq entries is 0
- delete qpair
function: scripts/conformance/05_controller/sqe_cqe_test.py::test_sqe_cqe_discontinuous_cid
verify two command with discontinuous cid
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- Figure 104
Steps
- create a cq and a sq both support 3 entries
- issue two commands with discontinuous cid
- check its cid updated correctly
- delete qpair
function: scripts/conformance/05_controller/sqe_cqe_test.py::test_sqe_cqe_max_cid
issue command which cid is maximum or minimum
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- Figure 104
Steps
- in NVMe 2.0, 0xffff is not a valid cid
- create a cq and a sq both support 3 entries
- send max/min cid commands
- check its cid updated correctly
- delete qpair
function: scripts/conformance/05_controller/sqe_cqe_test.py::test_sqe_cqe_cid_conflict
two commands have conflicting cid
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- Figure 104
Steps
- create a cq and a sq both support 20 entries
- issue two same command to one sq
- check p-bit updated to 1, status should be Successful Completion or Command ID Conflict
- delete qpair
function: scripts/conformance/05_controller/sqe_cqe_test.py::test_sqe_cqe_reserved
verify Reserved field is non-zero
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- Figure 104
Steps
- create a cq and a sq both support 3 entries
- issue a command, reserved field is non-zero.
- check status should be Successful Completion
- delete qpair
function: scripts/conformance/05_controller/sqe_cqe_test.py::test_sqe_cqe_fuse_is_zero
verify fuse field is zero
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- Figure 104
Steps
- create a cq and a sq both support 3 entries
- issue a command, FUSE field is zero.
- check status should be Successful Completion
- delete qpair
function: scripts/conformance/05_controller/sqe_cqe_test.py::test_sqe_cqe_opc_invalid_admin_cmd
verify admin command with invalid command opcode
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- Figure 104
Steps
- issue an admin command with Invalid Command Opcode will be aborted
function: scripts/conformance/05_controller/sqe_cqe_test.py::test_sqe_cqe_opc_invalid_nvm_cmd
verify nvm command with invalid command opcode
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- Figure 104
Steps
- create a cq and a sq both support 3 entries
- issue command with invalid command opcode.
- check status should be Invalid Command Opcode
- delete qpair
function: scripts/conformance/05_controller/sqe_cqe_test.py::test_sqe_cqe_ns_invalid
verify command with invalid Namespace.
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- 6.1.5 NSID and Namespace Relationships
Steps
- create a cq and a sq both support 3 entries
- issue a command, Namespace field is invalid.
- check status should be Invalid Namespace or Format
- delete qpair
function: scripts/conformance/05_controller/sqe_cqe_test.py::test_sqe_cqe_ns_broadcast
verify command with broadcast Namespace ID 0xffffffff.
Reference
- NVM Express Revision 1.4a, March 9, 2020.
- 6.1.5 NSID and Namespace Relationships
Steps
- create a cq and a sq both support 3 entries
- issue a command, Namespace field is invalid.
- check status should be Invalid Namespace or Format
- delete qpair
folder: scripts/conformance/06_tcg
file: scripts/conformance/06_tcg/01_use_case_test
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct01_level0_discovery
UCT-01: Level 0 Discovery
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- power cycle the device
- issue level 0 discovery
- check Number of ComIDs >= 1
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct02_properties
UCT-02: Properties
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call Properties method with the following HostProperties values: MaxComPacketSize = 4096 bytes, MaxPacketSize = 4076 bytes, MaxIndTokenSize = 4040 bytes
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct03_take_ownership
UCT-03: Taking Ownership of an SD
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- take ownership
- Call StartSession method with SPID = Admin SP UID
- Call Get method to retrieve MSID’s PIN column value from the C_PIN table
- CLOSE_SESSION
- Call StartSession method with SPID = Admin SP UID and HostSigningAuthority = SID authority UID
- SET_PASSWORD_FOR SID
- CLOSE_SESSION
- revert tper
- start session with SID
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct04_activate_locking_sp
UCT-04: Activate Locking SP when in Manufactured-Inactive State
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Admin SP UID and HostSigningAuthority = SID authority UID
- Call Activate method on Locking SP object
- CLOSE_SESSION
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- close session
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct05_configuring_authorities
UCT-05: Configuring Authorities
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- read LAST_REQUIRED_USER
- take ownership
- enable user1 and set passwd for it
- enable last_required_user and set passwd for it
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- close session
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = User1 authority UID
- close session
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = LAST_REQUIRED_USER authority UID
- close session
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct06_configuring_locking_objects
UCT-06: Configuring Locking Objects (Locking Ranges)
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- get LAST_REQUIRED_RANGE
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- close session
- write and verify
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct06_configuring_locking_objects_powercycle
UCT-06: Configuring Locking Objects (Locking Ranges)
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
- Power cycle the SD, and read locking range data
Steps
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- close session
- power cycle
- issue read and write command ,will return Data Protection Error
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct07_unlocking_range
UCT-07: Unlocking Ranges
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- For Opal, Call Set method on LAST_REQUIRED_RANGE
- close session
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- close session
- Call the Set method on the ReadLocked and WriteLocked columns of the LAST_REQUIRED_RANGE Locking object with a value of FALSE
- close session
- issue write and read command
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct08_erasing_range
UCT-08: Erasing Ranges
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- if device support pyrite, skip the test
- For Opal, Call Set method on LAST_REQUIRED_RANGE
- read AlignmentGranularity
- setup range
- unlock range
- verify data before erasing
- erasing range
- verify data
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct09_using_datastore
UCT-09: Using the DataStore Table
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- enable user1
- start locking sp admin1 session
- Call Set method on the BooleanExpr column of the ACE_DataStore_Set_All ACE object
- Call Set method on the BooleanExpr column of the ACE_DataStore_Get_All ACE object
- close session
- user1 auth session
- write magic_pattern to datastore table
- user1 auth session
- read data from datastore table and check it
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct10_enable_mbr_shadow
UCT-10: Enable MBR Shadowing and UCT-11: MBR Done
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Invoke Properties method
- read AlignmentGranularity
- start locking sp admin1 session
- Invoke the Set method on the BooleanExpr column of the ACE_MBRCONTROL_SET_DONE ACE object to include the UIDs of the User1 and LAST_REQUIRED_USER Authority objects
- invoke Get method on the Rows column of the MBR Table Descriptor Object
- invoke the Set method to change the RangeLength column of the LAST_REQUIRED_RANGE to SIZE_OF_MBR_TABLE_DESCRIPTOR_IN_LOGICAL_BLOCKS + 10 LBAs
- write 1s over the entire LAST_REQUIRED_RANGE
- call Get method on the MBR object in the Table table to retrieve the MandatoryWriteGranularity column value
- invoke Set method to write the MBR table with the MAGIC_PATTERN
- invoke Set method on the Enable column of the MBRControl table with a value of TRUE
- close session
- powercycle
- write the MAGIC_PATTERN over the entire LAST_REQUIRED_RANGE
- read from LBA 0 to the size of the MBR Table
- test_uct11_mbr_done
- read LAST_REQUIRED_USER
- enable user1 and set passwd for it
- enable last_required_user and set passwd for it
- close session
- Call the Set method on the ReadLocked and WriteLocked columns of the LAST_REQUIRED_RANGE Locking object with a value of FALSE
- close session
- read the entire LAST_REQUIRED_RANGE
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct12_revert_locking_sp
UCT-12: Revert the Locking SP using SID, with Locking SP in Manufactured state
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- write data over 64 logical blocks beginning at LBA 0
- Call StartSession method with SPID = Admin SP UID
- Call Revert method on Locking SP object
- Call StartSession method with SPID = Locking SP
- For Pyrite 1.00, do nothing for this step
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct13_revert_admin_sp_lockingsp_inactive
UCT-13: Revert the Admin SP using SID, with Locking SP in ManufacturedInactive state
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- get the tcg feature of the DUT
- take ownership
- write data over 64 logical blocks beginning at LBA 0
- Call StartSession method with SPID = Admin SP UID
- Call Revert method on Admin SP object
- read Behavior of C_PIN_SID Pin upon TPer Revert value in level0 discovery
- Call StartSession method with SPID = Locking SP
- Read 64 logical blocks beginning at LBA 0
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct14_revert_admin_sp_locking_sp_active
UCT-14: Revert the Admin SP using SID, with Locking SP in Manufactured state
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- get the tcg feature of the DUT
- Call StartSession method with SPID = Admin SP UID
- Call Get method on UID 00 00 00 06 00 00 02 02 to determine support
- close session
- write data over 64 logical blocks beginning at LBA 0
- Call StartSession method with SPID = Admin SP UID D and HostSigningAuthority = SID authority UID
- Call Revert method on Admin SP object
- read Behavior of C_PIN_SID Pin upon TPer Revert value in level0 discovery
- Call StartSession method with SPID = Locking SP
- For Pyrite 1.00, do nothing for this step
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct15_revert_admin_sp_locking_sp_active
UCT-15: Revert Admin SP using Admin1, with Locking SP in Manufactured state
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- get the tcg feature of the DUT
- check whether admin1 is supported
- Enable admin1
- write data over 64 logical blocks beginning at LBA 0
- Call StartSession method with SPID = Admin SP UID and HostSigningAuthority = Admin1 authority
- Call Revert method on Admin SP object
- read Behavior of C_PIN_SID Pin upon TPer Revert value in level0 discovery
- Call StartSession method with SPID = Locking SP
- For Pyrite 1.00, do nothing for this step
function: scripts/conformance/06_tcg/01_use_case_test.py::test_uct16_psid_revert
UCT-16: Revert the Locking SP using PSID
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- fill the correct PSID in the key here
- power cycle the device
- revert the device by psid
file: scripts/conformance/06_tcg/02_specific_functionality_test
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf01_transaction
SPF-01: Transaction Case 2:
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- start locking sp admin1 session
- write zero to datastore table
- close session
- send a subpacket that contains a startTransaction token with a status code of 0x00
- write magic_pattern to datastore table
- send a subpacket that contains an end transaction token with a status code of 0x00
- read data from datastore table and check it
- start locking sp admin1 session
- send a subpacket that contains a startTransaction token with a status code of 0x00
- write zero to datastore table
- read data from datastore table and check it
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf02_if_recv_behavior_tests_case1
SPF-02: IF-RECV Behavior Tests Case1
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Issue an IF-RECV command
- check a ComPacket header value of “All Response(s) returned – no further data”
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf02_if_recv_behavior_tests_case2
SPF-02: IF-RECV Behavior Tests Case2
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- start locking sp admin1 session
- read data from datastore table
- IF-Recv transfer length = 0x100
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf03_trylimit_case_sid
SPF-03: TryLimit SID
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- If SID C_PIN Object has a TryLimit Column value >0, try multiple with not match SD C_PIN to start session until SID C_PIN object’s Tries value = SID C_PIN object’s TryLimit value
- else do not perform this test step and the Test Suite SHALL mark the result of this step as NA
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = SID authority UID, will return AUTHORITY_LOCKED_OUT
- power cycle
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf03_trylimit_case_admin1
SPF-03: TryLimit Admin1
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- If Admin1 C_PIN Object has a TryLimit Column value >0, try multiple with not match Admin1 C_PIN to start session until Admin1 C_PIN object’s Tries value = Admin1 C_PIN object’s TryLimit value
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID, will return AUTHORITY_LOCKED_OUT
- power cycle
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf03_trylimit_case_user1
SPF-03: TryLimit User1
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- If User1 C_PIN Object has a TryLimit Column value >0, try multiple with not matchUser1 C_PIN to start session until User1 C_PIN object’s Tries value = User1 C_PIN object’s TryLimit value
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = User1 authority UID, will return AUTHORITY_LOCKED_OUT
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf04_tryreset_case_sid
SPF-04: Tries Reset
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- If SID C_PIN Object has a TryLimit Column value > 1, try multiple with not match SID C_PIN to start session until C_PIN object’s Tries value = SID C_PIN object’s TryLimit value -1
- Call StartSession method with SPID = Admin SP UID and HostSigningAuthority = SID authority UID
- Call Get method on the Tries Column of the SID Authority’s C_PIN Object
- Check if current sid_tries is zero
- CLOSE_SESSION
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf04_tryreset_case_admin1
SPF-04: Tries Reset
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- If Admin1 C_PIN Object has a TryLimit Column value > 1,try multiple with not match Admin1 C_PIN to start session until C_PIN object’s Tries value = Admin1 C_PIN object’s TryLimit value -1
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call Get method on the Tries Column of the Admin1 Authority’s C_PIN Object
- CLOSE_SESSION
- Check if current admin1_tries is zero
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf04_tryreset_case_user1
SPF-04: Tries Reset
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- If user1 C_PIN Object has a TryLimit Column value > 1,try multiple with not match user1 C_PIN to start session until C_PIN object’s Tries value = user1 C_PIN object’s TryLimit value -1
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = User1 authority UID.
- CLOSE_SESSION
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call Get method on the Tries Column of the User1 Authority’s C_PIN Object
- CLOSE_SESSION
- Check if current user1_tries is zero
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf05_tries_reset_on_power_cycle_sid
SPF-05: Tries Reset on Power Cycle
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- If SID C_PIN Object has a TryLimit Column value > 1, try multiple with not match SID C_PIN to start session until C_PIN object’s Tries value = SID C_PIN object’s TryLimit value
- power cycle
- Call StartSession method with SPID = Admin SP UID and HostSigningAuthority = SID authority UID
- Call Get method on SID’s C_PIN Object to retrieve the TryLimit Column’s value
- CLOSE_SESSION
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf05_tries_reset_on_power_cycle_admin1
SPF-05: Tries Reset on Power Cycle
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- If Admin1 C_PIN Object has a TryLimit Column value > 1,try multiple with not match Admin1 C_PIN to start session until C_PIN object’s Tries value = Admin1 C_PIN object’s TryLimit value
- power cycle
- open locking sp admin session
- Call Get method on Admin1’s C_PIN Object to retrieve the TryLimit Column’s value
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf05_tries_reset_on_power_cycle_user1
SPF-05: Tries Reset on Power Cycle
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- If user1 C_PIN Object has a TryLimit Column value > 1,try multiple with not match user1 C_PIN to start session until C_PIN object’s Tries value = user1 C_PIN object’s TryLimit value
- power cycle
- Call Get method on User1’s C_PIN Object to retrieve the TryLimit Column’s value
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf06_next_case1
SPF-06: Next
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- if device not supports opal, skip the test
- Call StartSession method with SPID = Locking SP UID
- Call Get method on the LockingInfo Table’s MaxRanges Column
- Call Next method on the Locking Table with an empty parameter list
- Call Next method on the Locking Table with the Where parameter set to the first UID from the list of UIDs, returned in step #3, and the Count parameter set to 1
- CLOSE_SESSION
- check a list of UIDs where the number of values = the MaxRanges value + 1
- check the first four bytes of each UID returned are 0x00000802
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf06_next_case2
SPF-06: Next
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- If device do not support pyrite, skip the test
- Call StartSession method with SPID = Locking SP UID
- Call Next method on the MethodID Table with an empty parameter list
- Call Next method on the MethodID Table with the Where parameter set to the first UID from the list of UIDs , returned in step #3 and the Count parameter set to 1
- CLOSE_SESSION
- check returns a list of UIDs where the number of values >= 7
- check the first four bytes of each UID returned are 0x00000006
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf07_host_session_number
SPF-07: Host Session Number (HSN)
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with HostSessionID = ARBITRARILY_VARYING HSN, SPID = Admin SP UID, and HostSigningAuthority = SID authority UID
- Call Get method on MSID C_PIN credential’s PIN Column
- CLOSE_SESSION
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf08_revert_sp_case1
SPF-08: RevertSP
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Write the MAGIC_PATTERN over 64 logical blocks beginning at LBA 0
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call RevertSP method with the KeepGlobalRangeKey/KeepData omitted
- Call StartSession method with SPID = Locking SP UID
- For all SSCs supported by this specification other than Pyrite 1.00, read 64 logical blocks beginning at LBA 0,
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf08_revert_sp_case2
SPF-08: RevertSP
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Write the MAGIC_PATTERN over 64 logical blocks beginning at LBA 0
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call RevertSP method with the KeepGlobalRangeKey/KeepData present and set to FALSE
- Call StartSession method with SPID = Locking SP UID, will return error
- Read 64 logical blocks beginning at LBA 0
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf08_revert_sp_case3
SPF-08: RevertSP
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Write the MAGIC_PATTERN over 64 logical blocks beginning at LBA 0
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call RevertSP method with the KeepGlobalRangeKey/KeepData present and set to TRUE
- Call StartSession method with SPID = Locking SP UID, will return error
- Read 64 logical blocks beginning at LBA 0
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf09_range_alignment_verification
SPF-09: Range Alignment Verification
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- This test case only applies to Opal 2.00, Opal 2.01, and Ruby 1.00 if the AlignmentRequired column value in the LockingInfo table = TRUE
- Call Get method on the LockingInfo Table to retrieve the LogicalBlockSize, AlignmentGranularity and LowestAlignedLBA column values
- setup lockingrange1
- close session
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf10_byte_table_access_granularity
SPF-10: Byte Table Access Granularity
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call Get method on the DataStore object in the Table table to retrieve the MandatoryWriteGranularity column value
- if mandatorywritegranularity is 1, skip test
- Call Set method to write the DataStore table with a number of 0s = a non-zero multiple of the MandatoryWriteGranularity column value
- CLOSE_SESSION
- read data from datastore table and check it
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf11_stack_reset
SPF-11: Stack Reset
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- open admin1 session
- Send a subpacket that contains a StartTransaction token with a status code of 0x00
- Call Set method on the Enabled Column of User1 Authority with a value of TRUE
- Issue STACK_RESET command
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call Get method to retrieve the value of the Enabled Column of User1 Authority
- CLOSE_SESSION
- check returns a value of FALSE
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf12_tper_reset_case1
SPF-12: TPer Reset
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- ProgrammaticResetEnable set to TRUE
- open admin1 session
- Locking_GlobalRange has ReadLocked and WriteLocked columns set to FALSE
- Locking_GlobalRange has ReadLockEnabled and WriteLockEnabled columns are set to TRUE
- LockOnReset column value includes Programmatic
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Issue the TPER_RESET command
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call Get method on the Locking_GlobalRange columns
- close session
- issue write command
- issue read command
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf13_authenticate
SPF-13: Authenticate
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- take ownership
- Call StartSession method with SPID = Admin SP UID
- Call Authenticate method with Authority = SID Authority UID and Proof = C_PIN_SID PIN column value
- Call Get method on UID Column of SID C_PIN
- CLOSE_SESSION
- returns the C_PIN_SID PIN object’s UID column value
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf15_random
SPF-15: Random
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID
- Call Random method with a Count = 32
- Call Random method with a Count = 32
- CLOSE_SESSION
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf16_common_name
SPF-16: CommonName
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- if device not support Opal 2.00 or Opal 2.01 or Ruby 1.00, skip the test
- open admin1 session
- Call the Set method on the CommonName column of the Admin1 authority object using the MAGIC_PATTERN
- Call the Set method on the CommonName column of Locking_GlobalRange using the MAGIC_PATTERN
- Call Get method on the CommonName column of the Admin1 authority object
- Call Get method on the CommonName column of the Locking_GlobalRange
- CLOSE_SESSION
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf17_additional_dataStore_tables_case1
SPF-17: Additional DataStore Tables
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- if device do not support Additional DataStore Table Feature, skip the test
- get Maximum Number of DataStore Tables value
- get the DataStore Table Size Alignment value
- take ownership
- activate locking sp
- Call Activate method on the Locking SP with a DataStoreTableSize
- CLOSE_SESSION
- open admin1 session
- Call Get method to retrieve the DataStore table’s Rows column value from the Table table
- CLOSE_SESSION
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf17_additional_dataStore_tables_case2
SPF-17: Additional DataStore Tables
Reference
1.
2. TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- if device do not support Additional DataStore Table Feature, skip the test
- get Maximum Number of DataStore Tables value
- get the DataStore Table Size Alignment value
- take ownership
- activate locking sp
- Call Activate method with a DataStoreTableSize
- CLOSE_SESSION
- open admin1 session
- Call Get method to retrieve each DataStore table’s Rows column value from the Table table
- CLOSE_SESSION
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf18_range_crossing_behavior
SPF-18: Range Crossing Behavior
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- if device do not support Opal, skip the test
- read mdts value
- read AlignmentGranularity
- open admin1 session
- setup locking range
- unlocked Locking_GlobalRange and Locking_Range
- close session
- Issue a Write and Read command, will return error
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf19_block_sid_authentication
SPF-19: Block SID Authentication
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- if device do not support Block SID Authentication Feature, skip the test
- get MSID
- Issue IF-SEND with Hardware Reset bit in Clear Events field = 1
- Invoke StartSession method with SPID = Admin SP UID and HostSigningAuthority = SID authority UID
- Invoke StartSession method with SPID = Admin SP UID and HostSigningAuthority = SID authority UID
- Trigger a TCG Storage Hardware Reset on the SD
- Invoke StartSession method with SPID = Admin SP UID and HostSigningAuthority = SID authority UID
- Issue IF-SEND with Hardware Reset bit in Clear Events field = 0
- Invoke StartSession method with SPID = Admin SP UID and HostSigningAuthority = SID authority UID
- Power cycle the SD
- Invoke StartSession method with SPID = Admin SP UID and HostSigningAuthority = SID authority UID
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_spf20_data_removal_mechanism
SPF-20: Data Removal Mechanism
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- If device do not support Data Removal Mechanism, skip the test
- Get Supported Data Removal Mechanisms Feature Descriptor in Level 0 Discovery
- Invoke the StartSession method with SPID = Admin SP UID and HostSigningAuthority = SID authority UID
- Invoke the Get method on the ActiveDataRemovalMechanism column of the DataRemovalMechanism table
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_read_datastore
Read 9 rows from the datastore table
Reference
- TCG Storage Security Subsystem Class: Opal Specification Version 2.01
Steps
- start locking sp admin1 session
- read 9 rows from the datastore table
- close session
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_getacl
Verify the basic functionality of getacl Method
Reference
- TCG Storage Security Subsystem Class: Opal Specification Version 2.01
Steps
- start session
- invoke getacl method
- close session
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_set_lock_on_reset
Set lba range lock on reset
Reference
- TCG Storage Security Subsystem Class: Opal Specification Version 2.01
Steps
- start session
- set LockOnReset=powercycle
- close session
- disk power cycle
- start session
- get lockonreset value
- close session
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_write_longdata_to_datastore
Write long data to datastore table
Reference
- TCG Storage Security Subsystem Class: Opal Specification Version 2.01
Steps
- start locking sp admin1 session
- write 1k bytes to datastore table
- close session
- write 4k bytes to datastore table
- close session
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_mbr_table
Verify the basic functionality of mbr table
Reference
- TCG Storage Security Subsystem Class: Opal Specification Version 2.01
Steps
- start locking sp admin1 session
- write zero to mbr table
- close session
- write magic_pattern to datastore table
- powercycle
- format data
- read data from mbr table and check it
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_mbr_and_revert
write data to mbr table and revert
Reference
- TCG Storage Security Subsystem Class: Opal Specification Version 2.01
Steps
- start locking sp admin1 session
- write magic_pattern to mbr table
- read and check the data in mbr
- revert tper
- take ownership
- activate locking sp
- read data from mbr table and check it
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_done_on_reset
Set mbr table doneonreset
Reference
- TCG Storage Security Subsystem Class: Opal Specification Version 2.01
Steps
- start session
- set DoneOnReset=powercycle
- powercycle
- check DoneOnReset value
function: scripts/conformance/06_tcg/02_specific_functionality_test.py::test_write_maxdata_to_datastore
Write max data length to datastore
Reference
- TCG Storage Security Subsystem Class: Opal Specification Version 2.01
Steps
- Invoke Properties method to identify the MaxComPacketSize and MaxResponseComPacketSize
- start locking sp admin1 session
- limit the max token size
- write max data size to datastore
- read max data size from datastore
- close session
- check data
file: scripts/conformance/06_tcg/03_error_test_cases_test
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_01_native_protocol_rw_locked_error_responses
ETC-01: Native Protocol Read/Write Locked Error Responses
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- start locking sp admin1 session
- set Locking_GlobalRange ReadLockEnabled, WriteLockEnabled, ReadLocked and WriteLocked column values =TRUE
- issue write command
- issue read command
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_02_general_if_send_if_recv_synchronous_protocol
ETC-02: General – IF-SEND/IF-RECV Synchronous Protocol
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- issue an IF-SEND command
- Call Properties method using the ComID from the previous step
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_03_invalid_if_send_transfer_length
ETC-03: Invalid IF-SEND Transfer Length
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call Properties method to determine SD’s MaxComPacketSize
- Call Properties method with the correct ComPacket Header Length field to match the required ComPacket
- payload size but with the IF-SEND Transfer Length set to a value > MaxComPacketSize
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_04_invalid_sessionid_regular_session
ETC-04: Invalid SessionID – Regular Session
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- take ownership
- Call StartSession method with SPID = Admin SP UID
- Call Get method on MSID’s credential object in C_PIN table with a Packet SessionID value <> the current SessionID value
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_05_unexpected_token_outside_of_method_regular_session
ETC-05: Unexpected Token Outside of Method – Regular Session
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call Set method on the Enabled Column of User1 Authority with a value of FALSE and EndList Token before the Call Token
- Call Set method on the Enabled Column of User1 Authority with a value of FALSE and EndList Token before
- Invoke Get method on the Enabled Column of User1 Authority
- CLOSE_SESSION
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_06_unexpected_token_in_method_regular_session
ETC-06: Unexpected Token in Method Header – Regular Session
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call Set method on the Enabled Column of User1 Authority with a value of FALSE and an EndList Token immediately after the Call Token
- CLOSE_SESSION
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_07_unexpected_token_outside_of_method_control_session
ETC-07: Unexpected Token Outside of Method – Control Session
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID and an EndList Token before the Call Token
- Call StartSession method with SPID = Locking SP UID
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_08_unexpected_token_in_method_control_session
ETC-08: Unexpected Token in the Method Parameter List – Control Session
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call Properties method with StartList immediately after the Parameter StartList
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_10_invalid_invoking_id_get_case1
ETC-10: Invalid Invoking ID – Get_case1
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call Get method on Invoking UID of 00 00 08 01 AA BB CC DD
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_10_invalid_invoking_id_get_case2
ETC-10: Invalid Invoking ID – Get_case2
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Anybody authority UID
- Call Get method on Invoking UID of 00 00 10 01 00 00 00 00 (DataStore Table)
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_10_invalid_invoking_id_get_case3
ETC-10: Invalid Invoking ID – Get_case3
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call the StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call the Get method on the InvokingID 00 00 00 0B 00 01 00 01 (C_PIN_Admin1) to get the PIN, CharSet, TryLimit, and Tries columns
- CLOSE_SESSION
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_10_invalid_invoking_id_get_case4
ETC-10: Invalid Invoking ID – Get_case4
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call the StartSession method with SPID = Locking SP UID and HostSigningAuthority = Anybody authority UID
- Call the Get method on the InvokingID 00 00 00 00 00 00 00 01 (ThisSP)
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_11_invalid_invoking_id_non_get
ETC-11: Invalid Invoking ID – Non-Get
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID
- Call Set method on Invoking UID of 00 00 08 01 00 00 00 05
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_12_authorization
ETC-12: Authorization
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID
- Call Set method on the Enabled column of the User1 Authority
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_13_malformed_comPacket_header_regular_session
ETC-13: Malformed ComPacket Header – Regular Session
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Invoke Properties method to identify the MaxComPacketSize
- Invoke StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Invoke Set method on the Datastore Table such that the Length field in the ComPacket header exceeds the TPer’s MaxComPacketSize – 20, and the IF-SEND Transfer Length set to a value <= MaxComPacketSize
- Issue IF-RECV
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_16_overlapping_locking_ranges
ETC-16: Overlapping Locking Ranges
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call Set method on Locking_Range1
- Call Set method on Locking_Range2
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_17_invalid_type
ETC-17: Invalid Type
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call Set method on the Enabled column of the User1 Authority to value of 0xAAAA
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_18_revertsp_globalrange_locked
ETC-18: RevertSP – GlobalRange Locked
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- Call Set method on GlobalRange
- Call RevertSP method on the Locking SP with KeepGlobalRangeKey/KeepData = TRUE
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_19_ata_security_interaction
ETC-19: ATA Security Interaction
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- check if ATA password is supported
- set ATA password
- take ownership
- activate locking sp
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_20_startSession_on_inactive_locking_sp
ETC-20: StartSession on Inactive Locking SP
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_21_startsession_with_incorrect_hostChallenge
ETC-21: StartSession with Incorrect HostChallenge
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call StartSession method with SPID = Locking SP UID, HostSigningAuthority = Admin1 authority UID, and
- HostChallenge = a value that is different from the C_PIN_Admin1 PIN column value
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_22_multiple_sessions_case1
ETC-22: Multiple Sessions
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- Call Properties method to identify the MaxSessions
- Call StartSession method with SPID = Locking SP UID and Write = TRUE
- Call StartSession method with SPID = Locking SP UID and Write = TRUE
- close session
- power cycle
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_etc_23_data_removal_mechanism_set_unsupported_value
ETC-23: Data Removal Mechanism – Set Unsupported Value
Reference
- TCG Storage Opal Family Test Cases Specification, Revision 1.00
Steps
- If device do not support Data Removal Mechanism, skip the test
- Get Supported Data Removal Mechanisms Feature Descriptor in Level 0 Discovery
- Invoke the StartSession method with SPID = Admin SP UID and HostSigningAuthority = SID authority UID
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_data_over_maxcompacketsize
Read datastore table over MaxComPacketSize
Reference
- TCG Storage Security Subsystem Class: Opal Specification Version 2.01
Steps
- take ownership
- activate locking sp
- read data from the datastore table
- read data over MaxComPacketSize, and error is expected
function: scripts/conformance/06_tcg/03_error_test_cases_test.py::test_start_session_with_wrong_sp
start session with wrong sp
Reference
- TCG Storage Security Subsystem Class: Opal Specification Version 2.01
Steps
- start session with wrong sp, and error is expected
file: scripts/conformance/06_tcg/04_appendix_test
function: scripts/conformance/06_tcg/04_appendix_test.py::test_active_user_powercycle
dirty power off duration sessions
Reference
- TCG Storage Security Subsystem Class: Opal Specification Version 2.01
Steps
- Call StartSession method with SPID = Locking SP UID and HostSigningAuthority = Admin1 authority UID
- create user1
- close session
- write data
- flush data
- power cycle
- read data without user1
- active locking sp
- read data with user1
function: scripts/conformance/06_tcg/04_appendix_test.py::test_mbr_read_write
write and read mbr table
Reference
- TCG Storage Security Subsystem Class: Opal Specification Version 2.01
Steps
- Invoke Properties method
- start locking sp admin1 session
- invoke Get method on the Rows column of the MBR Table Descriptor Object
- call Get method on the MBR object in the Table table to retrieve the MandatoryWriteGranularity column value
- invoke Set method to write the MBR table with the MAGIC_PATTERN
- close session
function: scripts/conformance/06_tcg/04_appendix_test.py::test_datastore_read_write
write and read datastore table
Reference
- TCG Storage Security Subsystem Class: Opal Specification Version 2.01
Steps
- start locking sp admin1 session
- invoke Set method to write the datastore table with the MAGIC_PATTERN
- close session
Suite: scripts/benchmark
folder: scripts/benchmark
file: scripts/benchmark/idle_stress
tests disks in 24×7 standby scenarios with sporadic read/write IO, reflecting some PC office environments. It’s designed to check the disk’s ability to handle massive transitions in and out of low-power states.
file: scripts/benchmark/interval_read_disturb
Read specific Logical Block Addresses (LBAs) repeatedly over a long duration and check the impact of read disturb on the device. The test script uses multiple workers to perform different read operations on the device while idle times between the reads simulate a real-world usage pattern. The script uses a JEDEC enterprise workload and writes to the drive to clear it before the read operations start. The script also checks the device’s SMART health information, temperature, and UECC errors before and after the test.
This test script is designed to validate the device’s stability and error handling under heavy and repeated workloads.
file: scripts/benchmark/ioworker_stress
This script conducts a comprehensive stress test on NVMe SSDs to validate their stability, performance, and error handling capabilities under prolonged and varied workloads. The test involves running multiple randomized I/O operations concurrently with critical NVMe commands, such as SMART data retrieval, feature management, and abort operations. The script simulates a real-world usage scenario by continuously starting and stopping I/O workers while ensuring data integrity through the verification of the entire drive at the end of the test. This approach helps assess the SSD’s resilience and readiness for deployment in demanding environments.
file: scripts/benchmark/llm_loading
This test case evaluates the performance of an NVMe SSD under high-load conditions, particularly in scenarios requiring rapid loading of large amounts of data into memory, such as data handling for large language models (LLMs). It simulates realistic data filling and image loading operations, repeatedly executed for specified iterations with varying block sizes, to assess the read and write performance and data integrity of the SSD. The test starts with formatting the device, then fills a designated namespace area with a mix of random and sequential data, followed by writing and reading fixed-size data blocks. Parameterized test inputs include the size of the images and the number of test loops, allowing the test to run under multiple configurations to cover a broader range of use cases. Performance logs are recorded after each iteration to analyze in detail how the device performs under sustained, intense operations.
file: scripts/benchmark/longtime_readwrite
By writing extensively to consume SSD PE cycles and examining the degradation of read/write performance.
This script tests the impact of long-term SSD usage on read and write performance by consuming a large number of program/erase (PE) cycles. The script writes extensively to the SSD to consume a specified percentage of PE cycles and monitors the performance degradation over time.
The script is divided into stages, with each stage testing a different percentage of PE cycle consumption and space allocation. The stages are as follows:
Stage 2.1: Consumes 3% of PE cycles and allocates 30% of drive space.
Stage 2.2: Consumes 6% of PE cycles and allocates 60% of drive space.
Stage 2.3: Consumes 9% of PE cycles and allocates 90% of drive space.
Stage 2.6: Consumes 12% of PE cycles and allocates 100% of drive space.
There are adjusted stages for testing with QLC drives.
file: scripts/benchmark/performance
Evaluate the performance of a client SSD under various working conditions, such as IOPS, latency, and performance consistency. The impact of temperature and power consumption on the SSD’s performance is also taken into account.
file: scripts/benchmark/por_sudden
This script automates power cycling tests on NVMe SSDs, measuring response times in critical states post-power cycle.
It focuses on simulating both dirty (SPOR) and clean (POR) power cycles to evaluate SSD readiness and durability.
Quarch Power Analysis Module is required.
SPOR: Simulates an unexpected power loss without shutdown notification.
Phases of poweron timing:
- BAR Access Time: Time for a successful Controller Register write post-BAR access.
- Admin Ready Time: Time until the SSD is ready for admin commands post-reset.
- First I/O Completion Time: Time for completing the SSD’s first Read command post-reset.
file: scripts/benchmark/por_typical
This script automates power cycling tests on NVMe SSDs, measuring response times in critical states post-power cycle.
It focuses on simulating both dirty (SPOR) and clean (POR) power cycles to evaluate SSD readiness and durability.
Quarch Power Analysis Module is required.
Typical POR: Simulates a power loss with prior shutdown notification.
Phases of poweron timing:
- BAR Access Time: Time for a successful Controller Register write post-BAR access.
- Admin Ready Time: Time until the SSD is ready for admin commands post-reset.
- First I/O Completion Time: Time for completing the SSD’s first Read command post-reset.
file: scripts/benchmark/read_retention
Fill the entire disk with data and record the CRC of all LBAs to a disk file.
After a period of time with power off (e.g., 2 months), check whether the CRC
of the entire disk data matches the previous one.
- create a folder /home/crc with root privilege if it is not exist
- make test TESTS=scripts/benchmark/read_retention.py::test_prepare
- make test TESTS=scripts/benchmark/read_retention.py::test_verify
- collect test log and diagram in folder results
- poweroff, and keep the DUT for 2 months in room temperature
- after 2 months, insert DUT to the same SUT in step 2
- make test TESTS=scripts/benchmark/read_retention.py::test_verify
- collect test log and diagram in folder results
file: scripts/benchmark/replay_trace
The script contains a function collect_cmd_sequence that collects operations from a simple CSV-formatted trace file, which is used to describe a specific IO sequence. The collected operations include the (SLBA, NLB, opcode, and timestamp) information. The function converts the operations to different capacities and collects them into a list.
The test script test_replay_trace uses the collect_cmd_sequence function to collect commands from the trace file and replay them on the NVMe device. The script first collects a sequence of write and trim operations and executes them. Then it performs a clean power cycle by shutting down the subsystem and powering it off. After a delay, the script powers the subsystem back on and re-enables the HMB if it was enabled before. Finally, the script collects a sequence of read-only operations from the trace file and replays them on the NVMe device.
file: scripts/benchmark/reset_double
do reset during nvme init process
file: scripts/benchmark/saw_diagram
This test script aims to stress test the power state transitions of an NVMe device by
issuing read/write I/Os during the transition to low-power states such as PS3/PS4. The
test checks the robustness of power switching and the latency of exiting low-power states.
The test script involves the following steps:
- Checks if APST is enabled.
- Sets up test parameters.
- Enables ASPM L1.2.
- Fixes the device on PS0.
- Formats the drive.
- Fills the drive with data.
- Interrupts power state transitions by sending I/Os at an increasing idle time
- Measures the latency of I/Os during power state transitions.
- Collects and logs the latency data for analysis.
Notes for Dell DR Test:
- Connect the USB cable to the PC with QPS installed
- Set sampling time to 100 microseconds in QPS
file: scripts/benchmark/wear_leveling
This script conducts a wear leveling test on NVMe SSDs to evaluate their endurance and efficiency in managing data distribution across the memory cells. The test involves sequential and random write operations to different regions of the drive, simulating hot and cold data scenarios, and triggers wear leveling and garbage collection processes. The test measures IOPS (Input/Output Operations Per Second) throughout the operations and generates performance diagrams to assess the effectiveness of wear leveling. The script also includes power cycling and full-drive verification steps to ensure data integrity post-testing.
file: scripts/benchmark/write_latency
This script tests the long-tail latency of an NVMe drive by writing data sequentially with a 128K block size. It includes functions to prepare the test environment, such as formatting the drive, prefilling data, and enabling/disabling the Host Memory Buffer (HMB).
The main test function, write_128k_latency_diagram, writes a specified amount of data sequentially with a 128K block size and QD=1 and generates various diagrams to visualize the results, such as IOs per second, temperature, latency per IO, and latency distribution. The function is executed multiple times with a delay between each run.
The script checks if the total latency per IO of more than 8ms is not more than 1% of the total number of IOs and that the 99th percentile latency is less than 8ms (criteria_latency). If these conditions are not met, the test fails.
The test environment can be customized by changing the global variables in the script.
Suite: scripts/management
folder: scripts/management
file: scripts/management/01_mi_inband_test
function: scripts/management/01_mi_inband_test.py::test_mi_vpd_write_and_read
write, read and verify VPD contents
Reference
- NVM Express Management Interface Revision 1.1b, October 5, 2020.
- 5.11 VPD Read
- 5.12 VPD Write
Steps
- write VPD
- read VPD
- verify data
function: scripts/management/01_mi_inband_test.py::test_mi_reset
MI reset command
Reference
- NVM Express Management Interface Revision 1.1b, October 5, 2020.
- 5.8 Reset
Steps
- mi_reset
- skip if MI is not supported
- create subsystem
- send MI reset command
function: scripts/management/01_mi_inband_test.py::test_mi_invalid_operation
MI command with invalid opcode
Reference
- NVM Express Management Interface Revision 1.1b, October 5, 2020.
Steps
- send MI with an invalid command opcode
function: scripts/management/01_mi_inband_test.py::test_mi_configuration_get_health_status_change
send MI command to get configuration of Health Status Change
Reference
- NVM Express Management Interface Revision 1.1b, October 5, 2020.
- 5.1.2 Health Status Change (Configuration Identifier 02h)
Steps
- send MI command to get configuratrion of Health Status Change
function: scripts/management/01_mi_inband_test.py::test_mi_configuration_set_health_status_change
send MI command to set configuration of Health Status Change
Reference
- NVM Express Management Interface Revision 1.1b, October 5, 2020.
- 5.2.2 Health Status Change (Configuration Identifier 02h)
Steps
- send MI command to set configuration of Health Status Change, it shall complete successfully
function: scripts/management/01_mi_inband_test.py::test_mi_read_nvme_mi_data_structure_nvm_subsystem_information
send MI command
Reference
- NVM Express Management Interface Revision 1.1b, October 5, 2020.
Steps
function: scripts/management/01_mi_inband_test.py::test_mi_read_nvme_mi_data_structure_nvm_subsystem_information_wrong_command
send MI command
Reference
- NVM Express Management Interface Revision 1.1b, October 5, 2020.
Steps
function: scripts/management/01_mi_inband_test.py::test_mi_read_nvme_mi_data_structure_port_information
send MI command
Reference
- NVM Express Management Interface Revision 1.1b, October 5, 2020.
Steps
function: scripts/management/01_mi_inband_test.py::test_mi_read_nvme_mi_data_structure_port_information_wrong_port
send MI command
Reference
- NVM Express Management Interface Revision 1.1b, October 5, 2020.
Steps
file: scripts/management/02_basic_mgmt_cmd_test
function: scripts/management/02_basic_mgmt_cmd_test.py::test_mi_spec_appendix_a_read_drive_status
SMBus block read of the drive’s status (status flags, SMART warnings, temperature)
Reference
- Management Interface Specification, Revision 1.2c. Appendix A.
Steps
function: scripts/management/02_basic_mgmt_cmd_test.py::test_mi_spec_appendix_a_read_drive_static_data
I2c block read of the drive’s static data (VID and serial number)
Reference
- Management Interface Specification, Revision 1.2c. Appendix A.
Steps
function: scripts/management/02_basic_mgmt_cmd_test.py::test_mi_spec_appendix_a_reset_arbitration_bit
I2c send byte to reset Arbitration bit
Reference
- Management Interface Specification, Revision 1.2c. Appendix A.
Steps
function: scripts/management/02_basic_mgmt_cmd_test.py::test_mi_spec_appendix_a_read_drive_status_across_i2c_block_boundaries
I2C read of status and vendor content, I2C allows reading across I2c block boundaries
Reference
- Management Interface Specification, Revision 1.2c. Appendix A.
Steps
function: scripts/management/02_basic_mgmt_cmd_test.py::test_mi_aux_power_only_read_static_data
I2c block read of the drive’s static data with aux power only
Reference
- Management Interface Specification, Revision 1.2c.
Steps
- main power off
- read drive’s static data
- main power on and verify static data
- reset controller and verify static data
file: scripts/management/03_mi_cmd_set_test
function: scripts/management/03_mi_cmd_set_test.py::test_mi_read_mi_data_structure
read mi data structure
Reference
- Management Interface Specification, Revision 1.2c.
- 5.7 Read NVMe-MI Data Structure
Steps
- read NVM Subsystem Information
- read SMBus Port Information
function: scripts/management/03_mi_cmd_set_test.py::test_mi_nvm_subsystem_health_status_poll
send NVM Subsystem Health Status Poll command
Reference
- Management Interface Specification, Revision 1.2c.
- 5.6 NVM Subsystem Health Status Poll
Steps
- send NVM Subsystem Health Status Poll with Clear Status=0
- send nvme get log page command and compare temperature
- send NVM Subsystem Health Status Poll with Clear Status=1
function: scripts/management/03_mi_cmd_set_test.py::test_mi_nvm_subsystem_health_status_poll_clear
NVM Subsystem Health Status Poll command clear status
Reference
- Management Interface Specification, Revision 1.2c.
- 5.6 NVM Subsystem Health Status Poll
Steps
- issue nvme subsystem reset
- send NVM Subsystem Health Status Poll with Clear Status=0
- send NVM Subsystem Health Status Poll with Clear Status=1
- check NVM Subsystem Reset Occurred bit cleared
function: scripts/management/03_mi_cmd_set_test.py::test_mi_nvm_subsystem_health_status_poll_temperature
test if temperature changes are available through mi
Reference
- Management Interface Specification, Revision 1.2c.
- 5.6 NVM Subsystem Health Status Poll
Steps
- get composite temperature through mi
- run ioworker to heat the device
- get composite temperature through mi again
- Check the temperature changes
function: scripts/management/03_mi_cmd_set_test.py::test_mi_controller_health_status_poll
send Controller Health Status Poll command
Reference
- Management Interface Specification, Revision 1.2c.
- 5.3 Controller Health Status Poll
Steps
- send Controller Health Status Poll with Report All=0
- send Controller Health Status Poll with Report All
function: scripts/management/03_mi_cmd_set_test.py::test_mi_controller_health_status_poll_filter
Controller Health Status Poll command filter by Controller Health Status Changed Flags
Reference
- Management Interface Specification, Revision 1.2c.
- 5.3 Controller Health Status Poll
Steps
- send Controller Health Status Poll Clear Changed Flags
- send Controller Health Status Poll filter by Controller Health Status Changed Flags
- issue an AER command
- set feature to enable all asynchronous events
- get current temperature
- set Over Temperature Threshold to trigger AER
- send Controller Health Status Poll filter by Controller Health Status Changed Flags
- send Controller Health Status Poll Clear Changed Flags
function: scripts/management/03_mi_cmd_set_test.py::test_mi_configuration_get
Get Mi configuration
Reference
- Management Interface Specification, Revision 1.2c.
- 5.1 Configuration Get
Steps
- get current SMBus/I2C Frequency
- get current MCTP Transmission Unit Size
function: scripts/management/03_mi_cmd_set_test.py::test_mi_configuration_frequency
config different frequency
Reference
- Management Interface Specification, Revision 1.2c.
- 5.2 Configuration Set: 100KHz, 400KHz
Steps
- get current SMBus/I2C Frequency
- config frequency value
- check configuration set success
- vpd read 256 bytes
- config orig frequency
function: scripts/management/03_mi_cmd_set_test.py::test_mi_configuration_set
Set Mi configuration
Reference
- Management Interface Specification, Revision 1.2c.
- 5.2 Configuration Set
Steps
- set SMBus/I2C Frequency=1
- set Health Status Change
- set MCTP Transmission Unit Size=64
function: scripts/management/03_mi_cmd_set_test.py::test_mi_vpd_read
VPD read
Reference
- Management Interface Specification, Revision 1.2c.
- 5.11 VPD Read
Steps
function: scripts/management/03_mi_cmd_set_test.py::test_mi_ep_buf_write_read
Management Endpoint Buffer Write
Reference
- Management Interface Specification, Revision 1.2c.
- 5.5 Management Endpoint Buffer Write
Steps
- read SMBus Port Information
- Management Endpoint Buffer Write special data
- send Management Endpoint Buffer Read
- check data
function: scripts/management/03_mi_cmd_set_test.py::test_mi_reset
MI Reset
Reference
- Management Interface Specification, Revision 1.2c.
- 5.8 Reset
Steps
- issue mi reset
- issue nvme identify
file: scripts/management/04_mi_admin_cmd_test
function: scripts/management/04_mi_admin_cmd_test.py::test_mi_admin_get_log_page
MI get log page command
Reference
- Management Interface Specification, Revision 1.2c.
- 6 NVM Express Admin Command Set
Steps
- get smart-log through mi
- get smart data from nvme admin command
- compare data
function: scripts/management/04_mi_admin_cmd_test.py::test_mi_admin_aer_temperature
mi nvme get log page command should retain asynchronous event.
Reference
- Management Interface Specification, Revision 1.2c.
- 6 NVM Express Admin Command Set
Steps
- issue an AER command
- set feature to enable all asynchronous events
- get current temperature
- set Over Temperature Threshold to trigger AER
- send mi get log page command
- assert res[29] & 0x2
- set Under Temperature Threshold to trigger AER
- read log page to clear the event
- check smart data for critical warning of the temperature event
- recover to original setting
function: scripts/management/04_mi_admin_cmd_test.py::test_mi_admin_identify
MI identify command
Reference
- Management Interface Specification, Revision 1.2c.
- 6 NVM Express Admin Command Set
Steps
- send identify through mi
- send nvme identify command
- check identify data
function: scripts/management/04_mi_admin_cmd_test.py::test_mi_admin_timestamp
send mi command to set/getfeature of timestamp
Reference
- Management Interface Specification, Revision 1.2c.
- 6 NVM Express Admin Command Set
Steps
- set timestamp with MI cmd in either PS3 or PS4
- set the PS
- repeat get and check timestamp with MI
- restore to PS0
function: scripts/management/04_mi_admin_cmd_test.py::test_mi_admin_identify_diff_slot
send mi command in different slot
Reference
- Management Interface Specification, Revision 1.2c.
- 6 NVM Express Admin Command Set
Steps
- send nvme identify command
- send mi identify command with slot0 and check data
- send mi identify command with slot1 and check data
function: scripts/management/04_mi_admin_cmd_test.py::test_mi_fw_download
send mi nvme fw download command
Reference
- Management Interface Specification, Revision 1.2c.
- 6 NVM Express Admin Command Set
Steps
- config frequency value
- check configuration set success
- slice fw image
- send mi nvme fw download command
file: scripts/management/05_mi_control_primitive_test
function: scripts/management/05_mi_control_primitive_test.py::test_mi_control_primitive_pause
Control Primitives Pasue
Reference
- Management Interface Specification, Revision 1.2c.
- 4.2.1.1 Pause
Steps
function: scripts/management/05_mi_control_primitive_test.py::test_mi_control_primitive_resume
Control Primitives Resume
Reference
- Management Interface Specification, Revision 1.2c.
- 4.2.1.2 Resume
Steps
function: scripts/management/05_mi_control_primitive_test.py::test_mi_control_primitive_abort
Control Primitives Abort
Reference
- Management Interface Specification, Revision 1.2c.
- 4.2.1.3 Abort
Steps
function: scripts/management/05_mi_control_primitive_test.py::test_mi_control_primitive_get_state
Control Primitives Get State
Reference
- Management Interface Specification, Revision 1.2c.
- 4.2.1.4 Get State
Steps
function: scripts/management/05_mi_control_primitive_test.py::test_mi_control_primitive_replay
Control Primitives Replay
Reference
- Management Interface Specification, Revision 1.2c.
- 4.2.1.5 Replay
Steps
file: scripts/management/06_mi_pcie_cmd_test
function: scripts/management/06_mi_pcie_cmd_test.py::test_mi_pcie_cfg_read
PCIe Configuration Read
Reference
- Management Interface Specification, Revision 1.2c.
- 7.1 PCIe Configuration Read
Steps
- Send PCIe Configuration Read command
- check PCIe Configuration Read data
- Send PCIe Configuration Write command
file: scripts/management/07_mi_feature_test
function: scripts/management/07_mi_feature_test.py::test_mi_feature_configuration_set_and_reset
Set Mi configuration and mi reset
Reference
- Management Interface Specification, Revision 1.2c.
- This includes all NVMSubsystem ports (PCIe and SMBus/I2C), Management Endpoints,
- and Controller Management Interfaces. All state is returned to its default condition.
- 8.3.1 NVM Subsystem Reset
Steps
- get default MCTP Transmission Unit Size
- set MCTP Transmission Unit Size=128byte
- get current MCTP Transmission Unit Size
- issue mi reset
- get current MCTP Transmission Unit Size
function: scripts/management/07_mi_feature_test.py::test_mi_feature_set_mctp_unit_size
Set Mi configuration and mi reset
Reference
- Management Interface Specification, Revision 1.2c.
- 5.2 Configuration Set
Steps
- vpd read 100bytes and receive twice
- set MCTP Transmission Unit Size=128byte
- vpd read 100bytes and receive twice, the second receive timeout
- set MCTP Transmission Unit Size=64
- get current MCTP Transmission Unit Size
function: scripts/management/07_mi_feature_test.py::test_mi_feature_disable_ccen
disable nvme and send mi command
Reference
- Management Interface Specification, Revision 1.2c.
- 6 NVM Express Admin Command Set
Steps
- send nvme identify command
- set nvme cc.en=0
- send mi identify command
- check identify data
- check the controller is disabled
function: scripts/management/07_mi_feature_test.py::test_mi_feature_d3hot
enter pcie d3hot and send mi command
Reference
- Management Interface Specification, Revision 1.2c.
- 6 NVM Express Admin Command Set
Steps
- send nvme identify command
- enter pcie d3hot
- send mi identify command
- enter pcie d0
- check identify data
function: scripts/management/07_mi_feature_test.py::test_mi_feature_check_seq
check package sequence
Reference
- Management Interface Specification, Revision 1.2c.
- 3 Message Mi
Steps
function: scripts/management/07_mi_feature_test.py::test_mi_feature_command_latency
test mi command latency with io
Reference
- Management Interface Specification, Revision 1.2c.
- 5.11 VPD Read
Steps
- get current SMBus/I2C Frequency
- vpd read 256 bytes 100 cycles
file: scripts/management/08_mi_error_inject_test
function: scripts/management/08_mi_error_inject_test.py::test_mi_invalid_som_and_eom
send mi command with invalid som and eom
Reference
- Management Interface Specification, Revision 1.2c.
Steps
- send normal mi identify command
- send mi identify command with eom=0
function: scripts/management/08_mi_error_inject_test.py::test_mi_invalid_integrity_check
send mi command with invalid integrity check field
Reference
- Management Interface Specification, Revision 1.2c.
Steps
- send mi nvme admin command without any error
- send mi nvme admin command with invalid integrity check field
- check parameter error location
function: scripts/management/08_mi_error_inject_test.py::test_mi_invalid_crc32
send mi command with invalid crc32
Reference
- Management Interface Specification, Revision 1.2c.
Steps
- send mi identify command with invalid crc32
function: scripts/management/08_mi_error_inject_test.py::test_mi_invalid_offset
send mi nvme admin command with invalid offset
Reference
- Management Interface Specification, Revision 1.2c.
- 6 NVM Express Admin Command Set
Steps
- send mi identify command with invalid offset
- check parameter error location
- send mi identify command with offset over the size of the NVMe Admin Command completion data.
function: scripts/management/08_mi_error_inject_test.py::test_mi_invalid_length
send mi nvme admin command with invalid length
Reference
- Management Interface Specification, Revision 1.2c.
- 6 NVM Express Admin Command Set
Steps
- send mi identify command with invalid length
- check parameter error location
- send mi identify command with invalid length over the size of the NVMe Admin Command completion data.
- check parameter error location
function: scripts/management/08_mi_error_inject_test.py::test_mi_invalid_opcode
send mi command with invalid opcode
Reference
- Management Interface Specification, Revision 1.2c.
Steps
- send mi nvme admin command with invalid opcode
- send mi command with invalid opcode
function: scripts/management/08_mi_error_inject_test.py::test_mi_invalid_nvme_command
send mi command with nvme command internal error
Reference
- Management Interface Specification, Revision 1.2c.
Steps
- send mi nvme admin command with nvme command internal error
- with pytest.warns(UserWarning, match=”mi status: 0x4″):
- check nvme cq entey status field != 0
function: scripts/management/08_mi_error_inject_test.py::test_mi_invalid_crc8
send mi command with invalid crc8
Reference
- Management Interface Specification, Revision 1.2c.
Steps
- send mi identify command with eom=0
- inject invalid crc8
- the next command should be corrupted
- but the following shall be accepted
function: scripts/management/08_mi_error_inject_test.py::test_mi_cmd_mixed
commands sent during the mi command sending process
Reference
- Management Interface Specification, Revision 1.2c.
- 4 Message Servicing Model
Steps
- send vpd read only 15 bytes
- send identify through mi
- send nvme identify command
- check identify data
file: scripts/management/09_mi_stress_test
function: scripts/management/09_mi_stress_test.py::test_mi_stress_mix_nvme_cmd
test mi command mix io command
Reference
- Management Interface Specification, Revision 1.2c.
- 6 NVM Express Admin Command Set
Steps
- send different mi command
- random read, get io latency
- mixing io and mi commands
- check for io latency changes
function: scripts/management/09_mi_stress_test.py::test_mi_stress_cmd_ctrl_mix
Control Primitives Mix
Reference
- Management Interface Specification, Revision 1.2c.
- 4.2.1 Control Primitives
Steps
function: scripts/management/09_mi_stress_test.py::test_mi_stress_io_with_mi_reset
IO and mi reset
Reference
- Management Interface Specification, Revision 1.2c.
- 5.8 Reset
Steps
- issue mi reset
- mi reset during io
function: scripts/management/09_mi_stress_test.py::test_mi_stress_power_change
main power cycle and i2c command
Reference
- Management Interface Specification, Revision 1.2c.
- 8 Management Architecture
Steps
- get the test data when power is on
- power off the main power
- start a thread to power cycle main power
- read vpd data and verify
- stop power cycle thread
- power on the SSD
function: scripts/management/09_mi_stress_test.py::test_mi_stress_diff_slot
Send mi commands with different slots
Reference
- Management Interface Specification, Revision 1.2c.
- 4 Message Servicing Model
Steps
function: scripts/management/09_mi_stress_test.py::test_mi_stress_basic_management_mix
mi command and basic management mixed
Reference
- Management Interface Specification, Revision 1.2c.
- 4 Message Servicing Model
Steps
- mix send mi command and basic management command
function: scripts/management/09_mi_stress_test.py::test_mi_stress_inband_oob_cmd_mix
mi command and out of band command mixed
Reference
- Management Interface Specification, Revision 1.2c.
- 4 Message Servicing Model
Steps
- skip if mi command is not supported
- mix send mi command and basic management command
file: scripts/management/samsung_test
Suite: scripts/production
folder: scripts/production
file: scripts/production/01_normal_io_test
This file contains long-duration IO tests aimed at evaluating the reliability, endurance, and performance of NVMe SSDs under sustained workloads. The tests cover various read/write patterns, including random and sequential operations with different block sizes and ratios, running for extended periods from 30 minutes to several days. These tests are designed to ensure that the NVMe SSDs can handle continuous stress, identify potential issues, and verify that the devices meet required performance and stability standards over their expected lifespan.
file: scripts/production/02_mix_io_test
This file contains a series of mixed IO tests aimed at evaluating the performance and reliability of NVMe SSDs under various conditions, including different block sizes, read/write ratios, and IO patterns over extended durations. The tests simulate real-world workloads by varying parameters such as queue depth and block size, switching between random and sequential operations, and collecting performance data. These tests are designed to stress the SSD and ensure it can handle diverse and intensive usage scenarios.
file: scripts/production/03_data_model_test
This file contains a series of data model tests designed to simulate real-world workloads on NVMe SSDs. Each test emulates different application scenarios, such as cloud computing, SQL databases, and content delivery networks, by varying parameters like block size, read/write ratio, and randomness. The purpose of these tests is to assess the SSD’s performance, endurance, and reliability under conditions that mimic actual usage patterns in diverse environments.
file: scripts/production/04_trim_format_test
This file includes a series of tests focused on assessing NVMe SSD performance under various conditions, particularly during and after trim operations. The tests simulate workloads that involve sequential and random writes, followed by trim operations and subsequent performance evaluations. These scenarios help determine how effectively the SSD maintains performance when managing trimmed data and handling mixed IO patterns over extended periods.
file: scripts/production/05_small_range_test
This file contains a set of tests designed to evaluate the performance and reliability of NVMe SSDs by executing various read and write operations on specific LBA ranges and random regions within the drive. The tests focus on stressing the SSD with different workloads, such as repeated reads and writes on the same or multiple LBAs, and small range operations. These scenarios are intended to simulate real-world usage patterns and assess how the SSD manages data across its storage space over extended durations.
file: scripts/production/06_jesd_workload_test
This file includes a test case designed to evaluate NVMe SSD performance and endurance under a JEDEC JESD 219 workload, which simulates a typical client workload for solid-state drives. The test involves a sequence of operations: a full drive sequential write with 128KB block sizes, followed by 4KB random writes, and concluding with a workload distribution that mimics real-world usage scenarios. The purpose is to assess how well the SSD handles sustained writes, mixed workloads, and different IO patterns over an extended period.
file: scripts/production/07_power_cycle_test
This script automates power cycling tests on NVMe SSDs to assess their response times and reliability under different power loss conditions. It focuses on simulating both sudden (dirty) and typical (clean) power cycles. These tests help evaluate the SSD’s resilience and ability to maintain data integrity across 1000 cycles, ensuring the device meets stringent durability standards.
file: scripts/production/08_io_stress_test
This script conducts a comprehensive stress test on NVMe SSDs to validate their stability, performance, and error handling capabilities under prolonged and varied workloads. The test involves running multiple randomized I/O operations concurrently with critical NVMe commands, such as SMART data retrieval, feature management, and abort operations. The script simulates a real-world usage scenario by continuously starting and stopping I/O workers while ensuring data integrity through the verification of the entire drive at the end of the test. This approach helps assess the SSD’s resilience and readiness for deployment in demanding environments.
file: scripts/production/09_wl_stress_test
This script conducts a wear leveling test on NVMe SSDs to evaluate their endurance and efficiency in managing data distribution across the memory cells. The test involves sequential and random write operations to different regions of the drive, simulating hot and cold data scenarios, and triggers wear leveling and garbage collection processes. The test measures IOPS (Input/Output Operations Per Second) throughout the operations and generates performance diagrams to assess the effectiveness of wear leveling. The script also includes power cycling and full-drive verification steps to ensure data integrity post-testing.